by Patrick Thibodeau, ComputerWorld

At the supercomputing conference here, there’s an almost obsessive focus on developing an exascale computing system — one that would be roughly 1,000 times more powerful than any existing system — before the end of the decade.
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by Anne Trafton, MIT News Office
For decades, scientists have dreamed of building computer systems that could replicate the human brain’s talent for learning new tasks.

MIT researchers have now taken a major step toward that goal by designing a computer chip that mimics how the brain’s neurons adapt in response to new information. This phenomenon, known as plasticity, is believed to underlie many brain functions, including learning and memory.
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by Sylvie Barak, EETimes

Disruptive technologies like the GPU are important steps on the path to exascale computing said Nvidia Corp.’s CEO Jen Hsun Huang in a keynote at SC11 on Tuesday (Nov. 15).

With supercomputing already an essential tool in modern science, Huang said the industry’s work in the space was “vitally important to society and the advancement of culture,” but that reaching exascale was something of an innovator’s dilemma.
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by Jansen Ng, Daily Tech
GPGPU and cloud computing have been hot topics for the last several years. Intel has shown off several designs like Larrabee and the Single-chip Cloud Computer in the past. However, it is Knights Corner that will be the firm’s first commercial product to use the Many Integrated Core (MIC) architecture. It will be offered as a PCIe add-in board.

The MIC concept is simple: Use architecture specifically designed to process highly parallel workloads, but ensure compatibility with existing x86 programming models and tools.
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by Jansen Ng, Daily Tech
AMD launched its much anticipated Bulldozer architecture for the consumer market last month, but many were disappointed at the performance numbers. Now the company has officially launched new processors using the same architecture for the server and workstation markets, but things have changed significantly.
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by Jason Mick, Daily Tech
New octacore designs will likely launch in late 2012 or early 2013 in Samsung smartphones and tablets

ARM Holdings, Plc. (LON:ARM) is making waves in the crowded mobile graphics market, airing a new, more powerful next-generation design [1][2].

The chipmaker, best known for its licensed reduced instruction set computer (RISC) processors, is also pushing licensable mobile graphics processing unit (GPUs) technology, including the new design — dubbed the Mali-T658. The Mali-T658 smartphone-aimed multi-core GPU promises smoother HD video playback and improved polygon pushing in games.

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The University of Illinois’ National Center for Supercomputing Applications (NCSA) has finalized a contract with Cray Inc. (Nasdaq: CRAY), to provide the supercomputer for the National Science Foundation’s Blue Waters project.

This new Cray supercomputer will support significant research advances in a broad range of science and engineering domains, meeting the needs of the most compute-intensive, memory-intensive, and data-intensive applications. Blue Waters is expected to deliver sustained performance, on average, of more than one petaflops on a set of benchmark codes that represent those applications and domains.
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Directives-Based Programming Makes Accelerating Applications Using CPUs and GPUs Dramatically Easier Than Modifying Underlying Code

In an effort to make it easier for programmers to take advantage of parallel computing, NVIDIA, Cray Inc., the Portland Group (PGI), and CAPS enterprise announced today a new parallel-programming standard, known as OpenACC™.

Initially developed by PGI, Cray, and NVIDIA, with support from CAPS, OpenACC is a new open parallel programming standard designed to enable the millions of scientific and technical programmers to easily take advantage of the transformative power of heterogeneous CPU/GPU computing systems.
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CORVALLIS, OR (1 November 2011) - Today marks the official launch of the ACM’s Special Interest Group on High Performance Computing. SIGHPC is the first international group within a major professional society that is devoted exclusively to the needs of students, faculty, and practitioners in high performance computing.
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By Anthony Shvets, CPU World
In August we reported about upcoming price drops of Intel microprocessors in September and October 2011. In accordance with the story, Intel reduced prices of energy-efficient Core i5 and i7 CPUs in September. The second round of price cuts happened today. The latest Intel pricelist shows 13% - 15% lower prices for Pentium G630, G850, and Core i3-2120 models. The pricelist also includes new Core i7-2700K microprocessor.
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by Sylvie Barak
Intel Corp.’s 22-nm Ivy Bridge CPUs will likely launch in March, one quarter later than originally planned, but well within Intel’s revised timeframe of “Spring 2012.”

Intel originally targeted late 2011 for Ivy Bridge, in time for launch at the annual Consumer Electronics Show in Las Vegas, but that timeframe had been pushed back by the firm owing to delays. Intel’s current Sandy Bridge generation of CPUs was unveiled at CES in January 2011.

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By Lucas Mearian, ComputerWorld
OCZ yesterday released the industry’s first 2.5-in solid-state drive (SSD) with up to 1TB of capacity. The drive, based on the new Indilinx Everest controller, includes an “instant on” feature, that reduces boot times over previous OCZ SSDs by 50%.

The new Octane SSD also is priced from $1.10 to $1.30 per gigabyte, meaning a 128GB model would sell for around $166.
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By Arnon Peleg, Intel
Intel recently released an updated version of the Intel® OpenCL SDK for the CPU with significant new features and new performance improvements.

Available for free download at www.intel.com/go/opencl, the Intel® OpenCL SDK 1.5 makes it easy for you to design, build, debug, and profile OpenCL™ applications running on the CPU device, and is optimized for Intel® Core™ and Intel® Xeon® processors.
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By Asaf Shelly
This is not to say that compilers can automatically parallelize code. I would however really like to see that happen and here is an interesting and reliable way to parallelize operations. If a compiler can use this method of thinking then it can also be used as hints for developers writing code today.

C and C++ languages are based on mathematical expressions. So much so that 1; is a legal operation in C\++. Other languages such as C#, Java, VB and Delphi also use mathematical operations to before actions. For example:
MyInterger = GetCount() + GetLength()
Both are function calls that do some work.

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by Joseph Yiu, ARM Ltd., EETimes
Some application developers might need to port applications from 8-bit or 16-bit microcontrollers to the Cortex-M0. By moving from these architectures to the Cortex-M0, often you can get better code density, higher performance, and lower power consumption.

Common Modifications: When porting applications from these microcontrollers to the Cortex-M0, the modifications of the software typically involve the following:

1- Startup code and vector table. Different processor architectures have different startup code and interrupt vector tables. Usually the startup code and the vector table will have to be replaced.
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by Peter Clarke, EETimes
Processor IP licensor ARM Holdings plc has revealed a power efficient Cortex-A7 processor core that it says is intended to be used alongside its top-of-the-range Cortex-A15 as part of a heterogeneous power-driven multicore strategy.

The A7 is a dual-issue, eight-stage pipeline core that has been heavily optimized for power efficiency, but supports the same virtualization and extended addressing as the A15. As a result ARM (Cambridge, England) expects partners to implement a “little dog, big dog” strategy so that cores are selected to run applications based on power efficiency needs.
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by Anand Lal Shimpi, AnandTech
How do you keep increasing performance in a power constrained environment like a smartphone without decreasing battery life? You can design more efficient microarchitectures, but at some point you’ll run out of steam there. You can transition to newer, more power efficient process technologies but even then progress is very difficult to come by. In the past you could rely on either one of these options to deliver lower power consumption, but these days you have to rely on both - and even then it’s potentially not enough. Heterogeneous multiprocessing is another option available - put a bunch of high performance cores alongside some low performance but low power cores and switch between them as necessary.
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Magma Design Automation Inc., a provider of chip design software, today announced that Diodes Incorporated (Nasdaq: DIOD), a leading global manufacturer and supplier of high-quality application specific standard products within the broad discrete, logic and analog semiconductor markets, has used FineSim™ SPICE multi-CPU circuit simulation technology to tape out two highly integrated synchronous switching voltage regulators. The AP6502 and AP6503, 340 kHz switching frequency external compensated synchronous DC/DC buck converters, are designed for use in consumer electronics systems such as digital TVs, LCD monitors and set-top boxes, which require ultra-efficient voltage conversion. Utilizing FineSim SPICE multi-CPU simulation technology, Diodes Incorporated significantly reduced simulation runtime, enabling them to increase simulation coverage by 3X to 4X without sacrificing accuracy.
For more information read the full news release here:
http://www.neondrum.com/public/public_release.php?id=945

This week, with one day difference, new MPI versions of Open MPI and MVAPICH were announced. On Thursday, the Open MPI team announced the release of Open MPI version 1.4.4. This release is mainly a bug fix release over the previous v1.4.3 release. The team strongly recommends that all users upgrade to version 1.4.4 if possible.

A Day after, On Friday, Prof. Dhabaleswar Panda from Ohio State University announced on behalf of the MVAPICH team the release of MVAPICH2-1.7 and OSU Micro-Benchmarks (OMB) 3.4. You can check both Open MPI and OSU websites for details on the new releases.

As part of the release, Prof. Dhabaleswar Panda has provided some performance results, and according to him, MVAPICH2 1.7 is being made available with OFED 1.5.4 and it continues to deliver excellent performance. OpenFabrics/Gen2 on Westmere quad-core (2.53 GHz) with PCIe-Gen2 and Mellanox ConnectX2-QDR (Two-sided Operations) provides 1.64 microsec one-way latency (4 bytes), 3394 MB/sec unidirectional bandwidth and 6537 MB/sec bidirectional bandwidth. QLogic InfiniPath Support on Westmere quad-core (2.53 GHz) with PCIe-Gen2 and QLogic-QDR (Two-sided Operations) provides 1.70 microsec one-way latency (4 bytes), 3265 MB/sec unidirectional bandwidth and 4228 MB/sec bidirectional bandwidth. Prof. Dhabaleswar Panda results clearly indicate that if you go with InfiniBand, Mellanox ConnectX-2 provides lower latency and much higher throughput. Clearly the performance winner.

Morgan Kaufmann made available a new version of GPU Computing Gems Jade Edition. According to the web site:

This is the second volume of Morgan Kaufmann’s GPU Computing Gems, offering an all-new set of insights, ideas, and practical “;hands-on”; skills from researchers and developers worldwide. Each chapter gives you a window into the work being performed across a variety of application domains, and the opportunity to witness the impact of parallel GPU computing on the efficiency of scientific research.
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