2009 2008 2007 2006 2005 2004 2003 2002 2001
2000 1999 1998 1997 1996 Prior to 1995 Whitepapers
Papers listed here are either freely available on the web or obtained legally. Please respect the various copyright stipulations placed on these documents. If any author would like us to add or to remove their paper from here, please contact us at info@multicoreinfo.com.
Multicore Papers 2007
Simulating a Multicore Supercomputer [Slides]
Steven A. Guccione, CMPWare, Inc.
Austin Conference on Integrated Circuits and Systems (ACISC), 2008
Concurrent programming without locks
Keir Fraser and Tim Harris
ACM Transactions on Computer Systems (TOCS), Volume 25 , Issue 2 (May 2007)
Achieving Predictable Performance with On-Chip Shared L2 Caches for Manycore-Based Real-Time Systems
Sangyeun Cho, Lei Jin, and Kiyeon Lee
Proceedings of the IEEE Int’l Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA)
Package Technology to Address the Memory Bandwidth Challenge for Tera-scale Computing
Lesley Anne Polka, Huthasana Kalyanam, Grace Hu, Satish Krishnamoorthy
Intel Technology Journal, Volume 11, Issue 3, 2007
High Performance Combinatorial Algorithm Design on the Cell Broadband Engine Processor
D.A. Bader, V. Agarwal, K. Madduri, and S. Kang
Parallel Computing, 33(10-11):720-740, 2007
A Graph-Theoretic Analysis of the Human Protein-Interaction Network Using Multi-core Parallel Algorithms
D.A. Bader and K. Madduri
Sixth IEEE International Workshop on High Performance Computational Biology (HiCOMB), 2007
The Performance Effect of Multi-Core on Scientific Applications
Jonathan Carter, Yun He, John Shalf, Hongzhang Shan, Erich Strohmaier, and Harvey Wasserman
Cray Users Group (CUG) 2007
Using Supplier Locality in Power-Aware Interconnects and Caches in Chip Multiprocessors
Ehsan Atoofian and Amirali Baniasadi
Journal of Systems Architecture Vol 54, No. 5 (October 2007) pp. 507-518
Concurrency with Erlang [Requires IEEE Xplore login]
Steve Vinoski
Internet Computing, IEEEVolume: 11, Issue: 5, pages: 90-93
Process Scheduling Challenges in the Era of Multicore Processors
Suresh Siddha, Venkatesh Pallipadi, Asit Mallick
Intel Technology Journal, Vol. 11, Issue 04, November 2007
Memory Performance Attacks: Denial of Memory Service in Multi-Core Systems
Thomas Moscibroda and Onur Mutlu, Microsoft Research
16th USENIX Security Symposium 2007
Implicitly parallel programming models for thousand-core microprocessors
Wen-mei Hwu, Shane Ryoo, Sain-zee Ueng, John H. Kelm, et al.
Proceedings of the 44th annual conference on Design automation (DAC)
2007
Impact of process variations on multicore performance symmetry
Eric Humenay, David Tarjan and Kevin Skadron
Design, Automation, and Test in Europe 2007
A Class of Parallel Tiled Linear Algebra Algorithms for Multicore Architectures [Web link]
Alfredo Buttari, Julien Langou, Jakub Kurzak and Jack Dongarra
MIMS Preprint, LAPACK Working Note #191
Toward a Toolchain for Pipeline Parallel Programming on CMPs
John Giacomoni, Tipp Moseley, Graham Price, Brian Bushnell, Manish Vachharajani, and Dirk Grunwald
Second Workshop on Software Tools for MultiCore Systems (STMCS 2007)
Heterogeneous Chip Multiprocessor Design for Virtual Machines
Dan Upton and Kim Hazelwood
Second Workshop on Software Tools for MultiCore Systems (STMCS 2007)
An Integrated Tools Platform for Multi-Core Enablement
Beth Tibbitts, Evelyn Duesterwald
Second Workshop on Software Tools for MultiCore Systems (STMCS 2007)
Self-Describing Components: A Programming Model for Multicore Systems
James C. Browne and Nasim Mahmood
Second Workshop on Software Tools for MultiCore Systems (STMCS 2007)
Automatic Application-Specific Customization of Multicore Processor Microarchitecture
Shobana Padmanabhan, Ron K. Cytron, and John W. Lockwood
Second Workshop on Software Tools for MultiCore Systems (STMCS 2007)
Scalability : The Software Problem
Jonathan Appavoo, Volkmar Uhlig, and Dilma da Silva
Second Workshop on Software Tools for MultiCore Systems (STMCS 2007)
Data Parallel Haskell: a status report
Manuel M. T. Chakravart, Roman Leshchinski, Simon Peyton Jones, Gabriele Keller, and Simon Marlow
Declarative Aspects of Multicore Programming (DAMP) 2007
A Concurrent Constraint Handling Rules Implementation in Haskell with Software Transactional Memory
Edmund S. L. Lam and Martin Sulzmannn
Declarative Aspects of Multicore Programming (DAMP) 2007
Manticore: A heterogeneous parallel language
Matthew Fluet, Mike Rainey, John Reppy, Adam Shaw, and Yingqi Xiao
Declarative Aspects of Multicore Programming (DAMP) 2007
Implementing deterministic declarative concurrency using sieves
Sam Lindley
Declarative Aspects of Multicore Programming (DAMP) 2007
Direct Coherence: Bringing Together Performance and Scalability in Shared-Memory Multiprocessors
Alberto Ros and Manuel E. Acacio and José M. García
14th Int’l Conference on High Performance Computing (HiPC), Dec 2007
Desktop Workload Characterization for CMP/SMT and Implications for Operating System Design
Sven Bachthaler, Fernando Belli and Alexandra Fedorova
WIOSCA 2007
Base Vectors: A Potential Technique for Microarchitectural Classification of Applications
Dan Doucette and Alexandra Fedorova
WIOSCA 2007
A Survey of General-Purpose Computation on Graphics Hardware
John D. Owens, David Luebke, Naga Govindaraju, Mark Harris, Jens Krüger, et al.
Computer Graphics Forum
Architectural Exploration of Heterogeneous Multiprocessor Systems for JPEG
Seng Lin Shee, Andrea Erdos, Sri Parameswaran
International Journal of Parallel Programming (2007)
An FPGA Approach to Quantifying Coherence Traffic Efficiency on Multiprocessor Systems
Taeweon Suh, Shih-Lien L. Lu and Hsien-Hsin S. Lee
International Conference on Field Programmable Logic and Applications 2007
SuperMatrix Out-of-Order Scheduling of Matrix Operations for SMP and Multi-Core Architectures
Ernie Chan, Enrique S. Quintana-Orti, Gregorio Quintana-Orti, and Robert van de Geijn
Symposium on Parallelism in Algorithms and Architectures (SPAA 2007)
Proximity-Aware Directory-based Coherence for Multi-core Processor Architectures
Jeffery A Brown, Rakesh Kumar and Dean Tullsen
Symposium on Parallelism in Algorithms and Architectures (SPAA 2007)
A Parallel Dynamic Programming Algorithm on a Multi-core Architecture
Guangming Tan, Ninghui Sun and Guangrong Gao
Symposium on Parallelism in Algorithms and Architectures (SPAA 2007)
Feasibility Study of MPI implementation on the Heterogeneous Multi-Core Cell BE Architecture
Ganapathy Senthilkumar, Murali Velamati, Naresh Jayam, et al.
Symposium on Parallelism in Algorithms and Architectures (SPAA 2007)
Evaluating Synchronization Techniques for Light-weight Multithreaded/Multicore Architectures
Srinivas Sridharan, Arun Rodrigues and Peter Kogge
Symposium on Parallelism in Algorithms and Architectures (SPAA 2007)
Evaluating MapReduce for Multicore and Multiprocessor Systems
C. Ranger, R. Raghuraman, A. Penmetsa, G. Bradski and C. Kozyrakis
HPCA 2007
Extending Multicore Architectures to Exploit Hybrid Parallelism in Single-Thread Applications
H. Zhong, S. Lieberman, and S. Mahlke
HPCA 2007
Petascale Computing Research Challenges – A Manycore Perspective [Keynote]
Steve Pawlowski (Senior Fellow and Chief Technology Officer of the Digital Enterprise Group, Intel Corporation)
HPCA 2007
Interactions Between Compression and Prefetching in Chip Multiprocessors
A. Alameldeen and D. Wood
HPCA 2007
A Memory-Level Parallelism Aware Fetch Policy for SMT Processors
S. Eyerman and L. Eeckhout
HPCA 2007
Performance, Area and Bandwidth Implications on Large-Scale CMP Cache Design
Li Zhao, Ravi Iyer, Srihari Makineni, Jaideep Moses, Ramesh Illikkal, Donald Newell
CMP-MSI 2007
Core to Memory Interconnection Implications for Forthcoming On-Chip Multiprocessors
Carmelo Acosta, Francisco J. Cazorla, Alex Ramirez, and Mateo Valero
CMP-MSI 2007
Formal Verification of a Novel Snooping Cache Coherence Protocol for CMP
Xuemei Zhao, Karl Sammut, and Fangpo He
CMP-MSI 2007
An Adaptive Shared/Private NUCA Cache Partitioning Scheme for Chip Multiprocessors
H. Dybdahl and P. Stenström
HPCA 2007
Configurable Isolation: Building High Availability Systems with Commodity Multi-Core Processors
Nidhi Aggarwal, Parthasarathy Ranganathan, Norman P Jouppi, and James E Smith
ISCA 2007
Comparing Memory Systems for Chip Multiprocessors
Jacob Leverich, Hideho Arakida, Mark Horowitz, et al.
ISCA 2007
Physical Simulation for Animation and Visual Effects: Parallelization and Characterization for Chip Multiprocessors
Christopher J. Hughes, Radek Grzeszczuk, Eftychios Sifakis, et al.
ISCA 2007
Core Fusion: Accommodating Software Diversity in Chip Multiprocessors
Engin Ipek, Meyrem Kirman, Nevin Kirman, and Jose F. Martinez
ISCA 2007
Carbon: Architectural Support for Fine-Grained Parallelism on Chip Multiprocessors
Sanjeev Kumar, Christopher J Hughes, and Anthony Nguyen
ISCA 2007
Managing Shared L2 Caches on Multicore Systems in Software
D. Tam, R. Azimi, L. Soares, M. Stumm,
WIOSCA 2007 (at ISCA 2007)
Managing Energy-Performance Tradeoffs for Multithreaded Applications on Multiprocessor Architectures
Soyeon Park, Weihang Jiang, Sarita Adve, Yuanyuan Zhou
SIGMETRICS 2007
An Analysis of Microarchitecture Vulnerability to Soft Errors on Simultaneous Multithreaded Architectures [Requires IEEE Xplore login]
Wangyuan Zhang, Xin Fu, Tao Li, and Jose Fortes
ISPASS 2007
Modeling and Characterizing Power Variability in Multicore Architectures [ Requires IEEE Xplore login]
Ke Meng, Frank Huebbers, Russ Joseph, and Yehea Ismail
ISPASS 2007
A Comparison of Two Approaches to Parallel Simulation of Multiprocessors
Andrew Over, Bill Clarke and Peter Strazdins
ISPASS 2007
A Flexible Heterogeneous Multi-Core Architecture
Miquel Pericas, Ruben Gonzalez, Adrian Cristal, Francisco Cazorla, et al.
PACT 2007
Improving Performance Isolation on Chip Multiprocessors via an Operating System Scheduler
Alexandra Fedorova, Margo Seltzer and Michael Smith
PACT 2007
Software-Pipelining on Multi-Core Architectures
Alban Douillet and Guang R. Gao
PACT 2007
I2SEMS: Interconnects-Independent Security Enhanced Shared Memory Multiprocessor Systems
Manhee Lee, Minseon Ahn and Eun Jung Kim
PACT 2007
Compilers and Multi-Cores: A Performance Partnership or Missed Opportunity [Keynote Speech]
Fran Allen
PACT 2007
AA-Sort: A New Parallel Sorting Algorithm for Multi-Core SIMD Processors
Hiroshi Inoue, Takao Moriyama, Hideaki Komatsu and Toshio Nakatani
PACT 2007
Effective Management of DRAM Bandwidth in Multicore Processors
N. Rafique, W.-T. Lim, M. Thottethodi
PACT 2007
Latency Hiding in Multi-Threading and Multi-Processing of Network Applications
Xiaofeng Guo, Jinquan Dai, Long Li, Zhiyuan Lv and Prashant R. Chandra
PACT 2007
FAME: FAirly MEasuring Multithreaded Architectures
Javier Vera, Francisco J. Cazorla, Alex Pajuelo, et al.
PACT 2007
Using Predictive Modeling for Cross-Program Design Space Exploration in Multicore Systems
Salman Khan, Polychronis Xekalakis, John Cavazos and Marcelo Cintra
PACT 2007
Optimization of Sparse Matrix-vector Multiplication on Emerging Multicore Platforms
Samuel W. Williams, Leonid Oliker, Richard Vuduc, Katherine Yelick, et al.
SC 2007
Scaling Performance of Interior-Point Method on Large-Scale Chip Multiprocessor System
Mikhail Smelyanskiy, Victor W. Lee, Daehyun Kim, Anthony Nguyen, Pradeep Dubey
SC 2007
Multi-threading and One-sided Communication in Parallel LU Factorization
Parry Husbands, Katherine Yelick
SC 2007
Evaluating NIC Hardware Requirements to Achieve High Message Rate PGAS Support on Multi-Core Processors
Keith Underwood, Michael Levenhagen, Ron Brightwell
SC 2007
High-performance Ethernet-based Communications for Future Multi-core Processors
Michael Schlansker, Nagabhushan Chitlur, Erwin Oertli, et al.
SC 2007
Efficient Operating System Scheduling for Performance-asymmetric Multi-core Architectures
Tong Li, Dan Baumberger, David A. Koufaty, Scott Hahn
SC 2007
Data Access History Cache and Associated Data Prefetching Mechanisms
Yong Chen, Surendra Byna, Xian-He Sun
SC 2007
Multicore Surprises: Lessons Learned from Optimizing Sweep3D on the Cell Broadband Engine
Fabrizio Petrini, Gordon Fossum, Ana Varbanescu, Michael Perrone, Michael D. Kistler, et al.i
IPDPS 2007.
A Heterogeneous Lightweight Multithreaded Architecture [Requires IEEE Xplore login]
Li, S.; Kashyap, A.; Kuntz, S.; Brockman, J.; Kogge, P.; Springer, P.; Block, G.
IPDPS 2007
Cooperative Cache Partitioning for Chip Multiprocessors
Jichuan Chang and Guri Sohi
ACM International Conference on Supercomputing 2007
Sensitivity Analysis for Automatic Parallelization on Multi-Cores
Silvius Rus, Maikel Pennings and Lawrence Rauchwerger
ACM International Conference on Supercomputing 2007
Utilizing Dynamically Coupled Cores to Form a Resilient Chip Multiprocessor
C.C. LaFrieda, E. İpek, J.F. Martínez, and R. Manohar
Intl. Conf. on Dependable Systems and Networks (DSN), Edinburgh, Scotland, June 2007
Parallelization, Performance Analysis, and Algorithm Consideration of Hough Transform on Chip Multiprocessors
W. Li and Y.-K. Chen
Workshop on Design, Architecture and Simulation of Chip Multi-Processors, Dec. 2007
2009 2008 2007 2006 2005 2004 2003 2002 2001
2000 1999 1998 1997 1996 Prior to 1995 Whitepapers
