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	<title>MulticoreInfo.com</title>
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	<link>http://www.multicoreinfo.com</link>
	<description>The Portal for Multicore Resources</description>
	<pubDate>Tue, 09 Feb 2010 00:34:18 +0000</pubDate>
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		<title>University Of Maryland Named A CUDA Center Of Excellence</title>
		<link>http://www.multicoreinfo.com/2010/02/univ-maryland/</link>
		<comments>http://www.multicoreinfo.com/2010/02/univ-maryland/#comments</comments>
		<pubDate>Tue, 09 Feb 2010 00:34:18 +0000</pubDate>
		<dc:creator>Suren</dc:creator>
		
		<category><![CDATA[Academia News]]></category>

		<category><![CDATA[GPU]]></category>

		<guid isPermaLink="false">http://www.multicoreinfo.com/?p=8380</guid>
		<description><![CDATA[NVIDIA Corp. announced today that it has recognized the University of Maryland as a CUDA Center of Excellence, placing it in an elite grouping of 9 other universities and research organizations worldwide. The university was selected for its pioneering use of GPU computing and the CUDA programming model across research and teaching efforts within multiple [...]]]></description>
		<wfw:commentRss>http://www.multicoreinfo.com/2010/02/univ-maryland/feed/</wfw:commentRss>
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		<item>
		<title>Wearable computing research gains support</title>
		<link>http://www.multicoreinfo.com/2010/02/wearable-comp/</link>
		<comments>http://www.multicoreinfo.com/2010/02/wearable-comp/#comments</comments>
		<pubDate>Tue, 09 Feb 2010 00:30:52 +0000</pubDate>
		<dc:creator>Suren</dc:creator>
		
		<category><![CDATA[Future Tech]]></category>

		<guid isPermaLink="false">http://www.multicoreinfo.com/?p=8378</guid>
		<description><![CDATA[A project that aims to revolutionise the design of technologies for supporting research has been awarded a grant of 1.7 million (about $2.6 million) by the UK&#8217;s Engineering and Physical Sciences Research Council and the Arts and Humanities Research Council through the RCUK Digital Economy programme.
The multidisciplinary project, entitled PATINA (Personal Architectonics of Interfaces to [...]]]></description>
		<wfw:commentRss>http://www.multicoreinfo.com/2010/02/wearable-comp/feed/</wfw:commentRss>
		</item>
		<item>
		<title>ISSCC keynote: 100X power efficiency improvement is required</title>
		<link>http://www.multicoreinfo.com/2010/02/isscc-keynote/</link>
		<comments>http://www.multicoreinfo.com/2010/02/isscc-keynote/#comments</comments>
		<pubDate>Tue, 09 Feb 2010 00:29:37 +0000</pubDate>
		<dc:creator>Suren</dc:creator>
		
		<category><![CDATA[MulticoreInfo]]></category>

		<guid isPermaLink="false">http://www.multicoreinfo.com/?p=8376</guid>
		<description><![CDATA[Power efficiency is the single biggest challenge facing the mobile handset industry, and collaboration is needed to enable the industry to deliver a required 100X improvement in power efficiency for mobile devices, according to a keynote presentation at the International Solid State Circuits Conference (ISSCC) here Monday (Feb. 8).
Greg Delagi, senior vice president of wireless [...]]]></description>
		<wfw:commentRss>http://www.multicoreinfo.com/2010/02/isscc-keynote/feed/</wfw:commentRss>
		</item>
		<item>
		<title>AMD aims for GPUs in mainstream servers starting 2012</title>
		<link>http://www.multicoreinfo.com/2010/02/amd-gpus/</link>
		<comments>http://www.multicoreinfo.com/2010/02/amd-gpus/#comments</comments>
		<pubDate>Tue, 09 Feb 2010 00:21:35 +0000</pubDate>
		<dc:creator>Suren</dc:creator>
		
		<category><![CDATA[MulticoreInfo]]></category>

		<guid isPermaLink="false">http://www.multicoreinfo.com/?p=8374</guid>
		<description><![CDATA[By Agam Shah
Advanced Micro Devices will put more focus on tightly integrating graphics processor cores into mainstream servers starting 2012 as it tries to increase system performance, a company executive said.
Mainstream servers in the future could have a combination of graphics processors and CPUs in servers as applications take advantage of thousands of GPU cores, [...]]]></description>
		<wfw:commentRss>http://www.multicoreinfo.com/2010/02/amd-gpus/feed/</wfw:commentRss>
		</item>
		<item>
		<title>Massively parallel computing systems are coming, but what issues need to be solved?</title>
		<link>http://www.multicoreinfo.com/2010/02/massively-parallel/</link>
		<comments>http://www.multicoreinfo.com/2010/02/massively-parallel/#comments</comments>
		<pubDate>Tue, 09 Feb 2010 00:16:35 +0000</pubDate>
		<dc:creator>Suren</dc:creator>
		
		<category><![CDATA[MulticoreInfo]]></category>

		<guid isPermaLink="false">http://www.multicoreinfo.com/?p=8372</guid>
		<description><![CDATA[Embedded designers will only be able to exploit the potential of multicore processor architectures if the applications software takes advantage of parallelism. This was the starting point for the Massively Parallel Computing seminar held during IP/ESC09 in December 2009. 
Massively parallel computing architectures and parallel programming are not new, even in the embedded world – [...]]]></description>
		<wfw:commentRss>http://www.multicoreinfo.com/2010/02/massively-parallel/feed/</wfw:commentRss>
		</item>
		<item>
		<title>After delays, Intel rolls out Tukwila chip</title>
		<link>http://www.multicoreinfo.com/2010/02/intel-tukwila/</link>
		<comments>http://www.multicoreinfo.com/2010/02/intel-tukwila/#comments</comments>
		<pubDate>Tue, 09 Feb 2010 00:15:33 +0000</pubDate>
		<dc:creator>Suren</dc:creator>
		
		<category><![CDATA[MulticoreInfo]]></category>

		<guid isPermaLink="false">http://www.multicoreinfo.com/?p=8370</guid>
		<description><![CDATA[By Sharon Gaudin
After about a year of delays, Intel Corp. today took the wrappers off its high-end Itanium processor, which is code-named Tukwila.
The new Itanium 9300 processor originally was slated to be released early in 2009, but that timetable slipped twice last year. The timing turned out to benefit Intel a bit, because Tukwila ended [...]]]></description>
		<wfw:commentRss>http://www.multicoreinfo.com/2010/02/intel-tukwila/feed/</wfw:commentRss>
		</item>
		<item>
		<title>IBM rolls out first Power7 Unix servers</title>
		<link>http://www.multicoreinfo.com/2010/02/ibm-power7-2/</link>
		<comments>http://www.multicoreinfo.com/2010/02/ibm-power7-2/#comments</comments>
		<pubDate>Tue, 09 Feb 2010 00:14:28 +0000</pubDate>
		<dc:creator>Suren</dc:creator>
		
		<category><![CDATA[MulticoreInfo]]></category>

		<guid isPermaLink="false">http://www.multicoreinfo.com/?p=8368</guid>
		<description><![CDATA[By Mark Fontecchio
IBM rolled out four servers based on its new multicore Power7 processor at an event in New York on Monday, claiming superiority in the shrinking &#8212; but still substantial &#8212; Unix market.
The news comes a week after Oracle Corp. outlined plans to push the Sun Microsystems Sparc-Solaris combo as the foundation for high-end, [...]]]></description>
		<wfw:commentRss>http://www.multicoreinfo.com/2010/02/ibm-power7-2/feed/</wfw:commentRss>
		</item>
		<item>
		<title>IBM Taps Green Power With New Chips, Servers</title>
		<link>http://www.multicoreinfo.com/2010/02/ibm-green/</link>
		<comments>http://www.multicoreinfo.com/2010/02/ibm-green/#comments</comments>
		<pubDate>Tue, 09 Feb 2010 00:13:24 +0000</pubDate>
		<dc:creator>Suren</dc:creator>
		
		<category><![CDATA[MulticoreInfo]]></category>

		<guid isPermaLink="false">http://www.multicoreinfo.com/?p=8366</guid>
		<description><![CDATA[By Richard Adhikari
IBM&#8217;s new Power7 processors provide the foundation for several new Unix server offerings from the company. Each Power7 processor has up to eight cores and four threads per core. Power7 also features &#8220;TurboCore&#8221; mode and has &#8220;intelligent threads,&#8221; meaning the number of threads varies depending on the workload.
IBM on Monday launched a one-two [...]]]></description>
		<wfw:commentRss>http://www.multicoreinfo.com/2010/02/ibm-green/feed/</wfw:commentRss>
		</item>
		<item>
		<title>ISSCC: Intel has edge over AMD, for now</title>
		<link>http://www.multicoreinfo.com/2010/02/isscc-intel-amd/</link>
		<comments>http://www.multicoreinfo.com/2010/02/isscc-intel-amd/#comments</comments>
		<pubDate>Tue, 09 Feb 2010 00:11:38 +0000</pubDate>
		<dc:creator>Suren</dc:creator>
		
		<category><![CDATA[MulticoreInfo]]></category>

		<guid isPermaLink="false">http://www.multicoreinfo.com/?p=8364</guid>
		<description><![CDATA[Intel Corp. has a significant, if temporary, edge over archrival Advanced Micro Devices based on news and papers emerging here Monday (Feb.  at the International Solid State Circuits Conference (ISSCC).
Intel described at ISSCC its first 32nm server processor to use six cores. Meanwhile AMD discussed a new core it will use in its first [...]]]></description>
		<wfw:commentRss>http://www.multicoreinfo.com/2010/02/isscc-intel-amd/feed/</wfw:commentRss>
		</item>
		<item>
		<title>Intel: Chip technology will change everyday life</title>
		<link>http://www.multicoreinfo.com/2010/02/chip-tech/</link>
		<comments>http://www.multicoreinfo.com/2010/02/chip-tech/#comments</comments>
		<pubDate>Mon, 08 Feb 2010 11:56:27 +0000</pubDate>
		<dc:creator>Suren</dc:creator>
		
		<category><![CDATA[MulticoreInfo]]></category>

		<guid isPermaLink="false">http://www.multicoreinfo.com/?p=8362</guid>
		<description><![CDATA[Consumers will be able to fix their automobiles while the car gives step-by-step advice, attack their ailments by making computer models of various treatments to find the best one and duck into virtual fitting rooms to try on a store&#8217;s clothes without leaving home.
All that and much more will be possible - in some cases [...]]]></description>
		<wfw:commentRss>http://www.multicoreinfo.com/2010/02/chip-tech/feed/</wfw:commentRss>
		</item>
		<item>
		<title>Design Automation and Test in Europe 2010 Preview</title>
		<link>http://www.multicoreinfo.com/2010/02/date-2010p/</link>
		<comments>http://www.multicoreinfo.com/2010/02/date-2010p/#comments</comments>
		<pubDate>Sun, 07 Feb 2010 12:42:12 +0000</pubDate>
		<dc:creator>Suren</dc:creator>
		
		<category><![CDATA[MulticoreInfo]]></category>

		<guid isPermaLink="false">http://www.multicoreinfo.com/?p=8360</guid>
		<description><![CDATA[by Grant Martin
The Design Automation and Test in Europe 2010 conference will be held in Dresden Germany from March 8 to 12. DATE has many interesting things to offer attendees.  Here are some technical sessions that look interesting:
6.8 PANEL SESSION – The Challenges of Heterogeneous Multi-Core Debug
7.8 PANEL SESSION - Who is closing the [...]]]></description>
		<wfw:commentRss>http://www.multicoreinfo.com/2010/02/date-2010p/feed/</wfw:commentRss>
		</item>
		<item>
		<title>Making packet processing more efficient with network-optimized multicore designs: Part 2</title>
		<link>http://www.multicoreinfo.com/2010/02/packet-processing-2-2/</link>
		<comments>http://www.multicoreinfo.com/2010/02/packet-processing-2-2/#comments</comments>
		<pubDate>Sat, 06 Feb 2010 12:32:01 +0000</pubDate>
		<dc:creator>Suren</dc:creator>
		
		<category><![CDATA[MulticoreInfo]]></category>

		<guid isPermaLink="false">http://www.multicoreinfo.com/?p=8357</guid>
		<description><![CDATA[By Cristian F. Dumitrescu
Minimizing/hiding the latency of complex or I/O intensive operations
Apart from common operations performed by any network processing intensive application (see Part 1), packet processing involves some specific operations that cannot be efficiently implemented with a general purpose instruction set.
&#8230;
When using the pipeline model, each stage of the pipeline must still meet the [...]]]></description>
		<wfw:commentRss>http://www.multicoreinfo.com/2010/02/packet-processing-2-2/feed/</wfw:commentRss>
		</item>
		<item>
		<title>Making packet processing more efficient with a network-optimized multicore design: Part 1</title>
		<link>http://www.multicoreinfo.com/2010/02/packet-processing-2/</link>
		<comments>http://www.multicoreinfo.com/2010/02/packet-processing-2/#comments</comments>
		<pubDate>Sat, 06 Feb 2010 01:45:46 +0000</pubDate>
		<dc:creator>Suren</dc:creator>
		
		<category><![CDATA[MulticoreInfo]]></category>

		<guid isPermaLink="false">http://www.multicoreinfo.com/?p=8355</guid>
		<description><![CDATA[By Cristian F. Dumitrescu
With the advent of the latest generation of multi-core processors it has become feasible from the performance as well as from the power consumption point of view to build complete packet processing applications using general purpose architecture processors, rather than dedicated ASIC and ASSP SoCs.
Architects and developers in the industry are now [...]]]></description>
		<wfw:commentRss>http://www.multicoreinfo.com/2010/02/packet-processing-2/feed/</wfw:commentRss>
		</item>
		<item>
		<title>IBM demos 100-GHz graphene transistor</title>
		<link>http://www.multicoreinfo.com/2010/02/ibm-graphene/</link>
		<comments>http://www.multicoreinfo.com/2010/02/ibm-graphene/#comments</comments>
		<pubDate>Sat, 06 Feb 2010 01:44:11 +0000</pubDate>
		<dc:creator>Suren</dc:creator>
		
		<category><![CDATA[MulticoreInfo]]></category>

		<guid isPermaLink="false">http://www.multicoreinfo.com/?p=8353</guid>
		<description><![CDATA[A 100-GHz transistor has been demonstrated by IBM Research. Fabricated on new 2-inch graphene wafers and operating at room temperature, the RF graphene transistors are said to beat the speeds of all but the fastest GaAs transistors, paving the way to commercialization of high-speed, carbon-based electronics.
&#8220;There are all kinds of extraordinary claims being made every [...]]]></description>
		<wfw:commentRss>http://www.multicoreinfo.com/2010/02/ibm-graphene/feed/</wfw:commentRss>
		</item>
		<item>
		<title>NSF Teams with Microsoft to Move Scientific Research into the Cloud</title>
		<link>http://www.multicoreinfo.com/2010/02/nsf-microsoft/</link>
		<comments>http://www.multicoreinfo.com/2010/02/nsf-microsoft/#comments</comments>
		<pubDate>Fri, 05 Feb 2010 02:04:09 +0000</pubDate>
		<dc:creator>Suren</dc:creator>
		
		<category><![CDATA[MulticoreInfo]]></category>

		<guid isPermaLink="false">http://www.multicoreinfo.com/?p=8351</guid>
		<description><![CDATA[By Larry Greenemeier
Microsoft and the National Science Foundation (NSF) on Thursday announced plans to offer researchers and research groups selected through the agency&#8217;s merit review process free access to computer servers. Microsoft will host the computing infrastructure at its data centers, giving the researchers access to storage, computational and networking resources via the Internet for [...]]]></description>
		<wfw:commentRss>http://www.multicoreinfo.com/2010/02/nsf-microsoft/feed/</wfw:commentRss>
		</item>
		<item>
		<title>Intel reveals more details of its six-core Westmere chip</title>
		<link>http://www.multicoreinfo.com/2010/02/six-core-westmere/</link>
		<comments>http://www.multicoreinfo.com/2010/02/six-core-westmere/#comments</comments>
		<pubDate>Thu, 04 Feb 2010 02:18:21 +0000</pubDate>
		<dc:creator>Suren</dc:creator>
		
		<category><![CDATA[MulticoreInfo]]></category>

		<guid isPermaLink="false">http://www.multicoreinfo.com/?p=8349</guid>
		<description><![CDATA[by John Morris
The six-core version of Westmere will be available in both desktop (Gulftown) and dual-socket server versions. Not surprisingly, it shares a lot of the same features with the dual-core Core i3 and Core i5 Westmeres including Hyper-Threading (12 threads for a six-core chip), Turbo Boost for improved performance on tasks that are not [...]]]></description>
		<wfw:commentRss>http://www.multicoreinfo.com/2010/02/six-core-westmere/feed/</wfw:commentRss>
		</item>
		<item>
		<title>Increasing bandwidth in industrial applications with FPGA co-processors</title>
		<link>http://www.multicoreinfo.com/2010/02/bandwidth-fpga/</link>
		<comments>http://www.multicoreinfo.com/2010/02/bandwidth-fpga/#comments</comments>
		<pubDate>Thu, 04 Feb 2010 02:14:24 +0000</pubDate>
		<dc:creator>Suren</dc:creator>
		
		<category><![CDATA[MulticoreInfo]]></category>

		<guid isPermaLink="false">http://www.multicoreinfo.com/?p=8347</guid>
		<description><![CDATA[By Michael Parker, Altera Corp.
FPGAs have long been used as primary and co-processors in telecommunications. Digital signal processing (DSP) in industrial applications often has fundamental differences from the typical telecommunication application. In telecommunications, the input data is commonly high data rates with real time processing constraints requiring completion of calculations between successive input data buffers [...]]]></description>
		<wfw:commentRss>http://www.multicoreinfo.com/2010/02/bandwidth-fpga/feed/</wfw:commentRss>
		</item>
		<item>
		<title>ARM Preps 2-GHz, Multicore Chips for Smartphones</title>
		<link>http://www.multicoreinfo.com/2010/02/arm-2-ghz/</link>
		<comments>http://www.multicoreinfo.com/2010/02/arm-2-ghz/#comments</comments>
		<pubDate>Thu, 04 Feb 2010 02:04:28 +0000</pubDate>
		<dc:creator>Suren</dc:creator>
		
		<category><![CDATA[MulticoreInfo]]></category>

		<guid isPermaLink="false">http://www.multicoreinfo.com/?p=8345</guid>
		<description><![CDATA[by  Mark Hachman
While ARM has so failed to succeed in the netbook market, it is prepping faster, multicore versions of its Cortex processor, running up to speeds of 2 GHz. The goal? Take on Intel&#8217;s Atom and cement ARM&#8217;s space in the smartphone market.
This week, ARM reported fourth-quarter profits before taxes of about $32 [...]]]></description>
		<wfw:commentRss>http://www.multicoreinfo.com/2010/02/arm-2-ghz/feed/</wfw:commentRss>
		</item>
		<item>
		<title>More Cores: Coming to A Processor Near You</title>
		<link>http://www.multicoreinfo.com/2010/02/more-cores/</link>
		<comments>http://www.multicoreinfo.com/2010/02/more-cores/#comments</comments>
		<pubDate>Thu, 04 Feb 2010 02:03:08 +0000</pubDate>
		<dc:creator>Suren</dc:creator>
		
		<category><![CDATA[MulticoreInfo]]></category>

		<guid isPermaLink="false">http://www.multicoreinfo.com/?p=8342</guid>
		<description><![CDATA[Intel&#8217;s disclosure of more details of its upcoming 6-core Gulftown processor earlier today is just one of several moves aimed at adding more cores to the processors used in desktops and servers that we should be seeing over the next few months.
On the desktop front,Intel has said it will ship the desktop version of its [...]]]></description>
		<wfw:commentRss>http://www.multicoreinfo.com/2010/02/more-cores/feed/</wfw:commentRss>
		</item>
		<item>
		<title>Intel Paper to Reveal Reconfigurable Logic</title>
		<link>http://www.multicoreinfo.com/2010/02/reconfigurable-logic/</link>
		<comments>http://www.multicoreinfo.com/2010/02/reconfigurable-logic/#comments</comments>
		<pubDate>Thu, 04 Feb 2010 02:02:09 +0000</pubDate>
		<dc:creator>Suren</dc:creator>
		
		<category><![CDATA[MulticoreInfo]]></category>

		<guid isPermaLink="false">http://www.multicoreinfo.com/?p=8340</guid>
		<description><![CDATA[Intel will discuss the company&#8217;s current &#8220;Westmere&#8221; 32-nm technology at the International Solid -State Circuit conference next week. But Intel&#8217;s own research has been focused on improving the performance of future multi-core chips, including reconfigurable logic.
Intel launched the Westmere technology at the recent Consumer Electronics Show in January. The 32-nm technology, a process shrink from [...]]]></description>
		<wfw:commentRss>http://www.multicoreinfo.com/2010/02/reconfigurable-logic/feed/</wfw:commentRss>
		</item>
		<item>
		<title>Intel, AMD set to release first six-core desktop chips</title>
		<link>http://www.multicoreinfo.com/2010/02/intel-amd-six-core/</link>
		<comments>http://www.multicoreinfo.com/2010/02/intel-amd-six-core/#comments</comments>
		<pubDate>Thu, 04 Feb 2010 02:01:12 +0000</pubDate>
		<dc:creator>Suren</dc:creator>
		
		<category><![CDATA[MulticoreInfo]]></category>

		<guid isPermaLink="false">http://www.multicoreinfo.com/?p=8338</guid>
		<description><![CDATA[by John Morris
In the next few months, both Intel and AMD are slated to release the industry’s first six-core processors for desktop PCs. Chip makers are pitching these multi-core chips for multi-tasking and multimedia, but real-world consumer applications for six CPU cores remain limited, and for now these are likely to appeal only to PC [...]]]></description>
		<wfw:commentRss>http://www.multicoreinfo.com/2010/02/intel-amd-six-core/feed/</wfw:commentRss>
		</item>
		<item>
		<title>SPEC MPI2007 Benchmark Adds Data Suite for Systems with up to 2048 Cores</title>
		<link>http://www.multicoreinfo.com/2010/02/spec-mpi2007/</link>
		<comments>http://www.multicoreinfo.com/2010/02/spec-mpi2007/#comments</comments>
		<pubDate>Wed, 03 Feb 2010 01:38:09 +0000</pubDate>
		<dc:creator>Suren</dc:creator>
		
		<category><![CDATA[MulticoreInfo]]></category>

		<guid isPermaLink="false">http://www.multicoreinfo.com/?p=8336</guid>
		<description><![CDATA[The Standard Performance Evaluation Corp. (SPEC) has released a new version of its SPEC MPI2007 benchmark that adds a large data suite designed for systems from 64 to 2048 cores.
SPEC MPI2007, developed by SPEC’s High-Performance Group (SPEC/HPG), measures the performance of parallel computing systems and clusters running actual end-user Message-Passing Interface (MPI) applications. It provides [...]]]></description>
		<wfw:commentRss>http://www.multicoreinfo.com/2010/02/spec-mpi2007/feed/</wfw:commentRss>
		</item>
		<item>
		<title>Implementing Firmware for Embedded Intel Architecture Systems</title>
		<link>http://www.multicoreinfo.com/2010/02/firmware-intel/</link>
		<comments>http://www.multicoreinfo.com/2010/02/firmware-intel/#comments</comments>
		<pubDate>Wed, 03 Feb 2010 01:34:57 +0000</pubDate>
		<dc:creator>Suren</dc:creator>
		
		<category><![CDATA[MulticoreInfo]]></category>

		<guid isPermaLink="false">http://www.multicoreinfo.com/?p=8334</guid>
		<description><![CDATA[by John C. MacInnis
Embedded systems using the Intel architecture must include a firmware stack that initializes CPU cores, memory, I/O, peripherals, graphics, and provides runtime support for operating systems. While Intel architecture-based PC designs typically use a full BIOS solution as a firmware stack, many embedded systems are designed with a more optimized firmware layer [...]]]></description>
		<wfw:commentRss>http://www.multicoreinfo.com/2010/02/firmware-intel/feed/</wfw:commentRss>
		</item>
		<item>
		<title>ARM lays out roadmap with three more cores</title>
		<link>http://www.multicoreinfo.com/2010/02/arm-cores/</link>
		<comments>http://www.multicoreinfo.com/2010/02/arm-cores/#comments</comments>
		<pubDate>Wed, 03 Feb 2010 01:33:22 +0000</pubDate>
		<dc:creator>Suren</dc:creator>
		
		<category><![CDATA[MulticoreInfo]]></category>

		<guid isPermaLink="false">http://www.multicoreinfo.com/?p=8332</guid>
		<description><![CDATA[ARM Holdings plc (Cambridge, England) plans to launch three additions to its Cortex family of processor cores during 2010. The cores, codenamed Eagle, Heron and Merlin, all have lead licensing customers and deliveries of intellectual property will start either in 2010 or early in 2011 depending on the core, said Warren East, chief executive officer [...]]]></description>
		<wfw:commentRss>http://www.multicoreinfo.com/2010/02/arm-cores/feed/</wfw:commentRss>
		</item>
		<item>
		<title>Multicore and Parallel Programming Practices</title>
		<link>http://www.multicoreinfo.com/2010/02/prog-practices/</link>
		<comments>http://www.multicoreinfo.com/2010/02/prog-practices/#comments</comments>
		<pubDate>Wed, 03 Feb 2010 01:32:15 +0000</pubDate>
		<dc:creator>Suren</dc:creator>
		
		<category><![CDATA[MulticoreInfo]]></category>

		<guid isPermaLink="false">http://www.multicoreinfo.com/?p=8330</guid>
		<description><![CDATA[By Robert Hess
In case you haven’t realized it, the new trend in computer chip technology is multi-core. This is where most of the speed improvements moving forward will come from on our computers. To take full advantage of this however it is necessary to design your applications using Parallel Programming practices, also known as &#8220;parallelism&#8221;.
In [...]]]></description>
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