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	<title>MulticoreInfo.com</title>
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	<link>http://www.multicoreinfo.com</link>
	<description>The Portal for Multicore Resources</description>
	<pubDate>Thu, 02 Sep 2010 02:51:20 +0000</pubDate>
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		<title>IBM claims fastest MPU</title>
		<link>http://www.multicoreinfo.com/2010/09/fastest-mpu/</link>
		<comments>http://www.multicoreinfo.com/2010/09/fastest-mpu/#comments</comments>
		<pubDate>Thu, 02 Sep 2010 02:51:20 +0000</pubDate>
		<dc:creator>Sujana</dc:creator>
		
		<category><![CDATA[MulticoreInfo]]></category>

		<guid isPermaLink="false">http://www.multicoreinfo.com/?p=9295</guid>
		<description><![CDATA[IBM Corp. said Wednesday (Sept. 1) that it will begin shipping Sept. 10 a new mainframe computer computer capable of 50 billion instructions per second, powered by 96 microprocessors with clock speeds up to 5.2 gigahertz.
IBM (Armonk, N.Y.) said the z196 processor is a four-core chip that contains 1.4 billion transistors on a 512-square millimeter [...]]]></description>
		<wfw:commentRss>http://www.multicoreinfo.com/2010/09/fastest-mpu/feed/</wfw:commentRss>
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		<item>
		<title>The Intel Sandy Bridge Preview</title>
		<link>http://www.multicoreinfo.com/2010/09/sandy/</link>
		<comments>http://www.multicoreinfo.com/2010/09/sandy/#comments</comments>
		<pubDate>Thu, 02 Sep 2010 02:49:57 +0000</pubDate>
		<dc:creator>Sujana</dc:creator>
		
		<category><![CDATA[MulticoreInfo]]></category>

		<guid isPermaLink="false">http://www.multicoreinfo.com/?p=9293</guid>
		<description><![CDATA[by Anand Lal Shimpi 
The mainstream quad-core market has been neglected ever since we got Lynnfield  in 2009. Both the high end and low end markets saw a move to 32nm, but if you wanted a mainstream quad-core desktop processor the best you could get was a 45nm Lynnfield from Intel. Even quad-core Xeons [...]]]></description>
		<wfw:commentRss>http://www.multicoreinfo.com/2010/09/sandy/feed/</wfw:commentRss>
		</item>
		<item>
		<title>The intractability of parallel programming</title>
		<link>http://www.multicoreinfo.com/2010/09/intractability/</link>
		<comments>http://www.multicoreinfo.com/2010/09/intractability/#comments</comments>
		<pubDate>Thu, 02 Sep 2010 02:45:46 +0000</pubDate>
		<dc:creator>Sujana</dc:creator>
		
		<category><![CDATA[MulticoreInfo]]></category>

		<guid isPermaLink="false">http://www.multicoreinfo.com/?p=9291</guid>
		<description><![CDATA[By Andrew Binstock
It’s been eight years since simultaneous multithreading first appeared in popular processors, when Intel shipped it under the name of Hyper-Threading Technology. Since then, numerous companies have been trying to figure out how to get developers to leverage multiple threads on the desktop, whether in a single CPU or in the now-common multicore [...]]]></description>
		<wfw:commentRss>http://www.multicoreinfo.com/2010/09/intractability/feed/</wfw:commentRss>
		</item>
		<item>
		<title>Google Chrome 7 GPU Acceleration</title>
		<link>http://www.multicoreinfo.com/2010/08/chrome-gpu/</link>
		<comments>http://www.multicoreinfo.com/2010/08/chrome-gpu/#comments</comments>
		<pubDate>Tue, 31 Aug 2010 14:16:57 +0000</pubDate>
		<dc:creator>Sujana</dc:creator>
		
		<category><![CDATA[MulticoreInfo]]></category>

		<guid isPermaLink="false">http://www.multicoreinfo.com/?p=9288</guid>
		<description><![CDATA[By Wolfgang Gruener
With the release of the first versions of Chrome 7, we noticed a subtle speed increase in graphics-heavy websites  and suggested that Google is improving Chrome’s overall graphics performance. Our readers later found that GPU acceleration can already be manually activated in Chrome. Google has now officially confirmed that “there’s been a [...]]]></description>
		<wfw:commentRss>http://www.multicoreinfo.com/2010/08/chrome-gpu/feed/</wfw:commentRss>
		</item>
		<item>
		<title>Superscalar Programming 101 (Matrix)</title>
		<link>http://www.multicoreinfo.com/2010/08/superscalar2/</link>
		<comments>http://www.multicoreinfo.com/2010/08/superscalar2/#comments</comments>
		<pubDate>Tue, 31 Aug 2010 11:16:56 +0000</pubDate>
		<dc:creator>Sujana</dc:creator>
		
		<category><![CDATA[MulticoreInfo]]></category>

		<guid isPermaLink="false">http://www.multicoreinfo.com/?p=9286</guid>
		<description><![CDATA[For this 5-part article, Jim Dempsey takes a small, well-known algorithm, shows a common approach to parallelizing that algorithm, follows with a better one and lastly, produces a fully cache-sensitized approach. Readers will learn a methodology for interpreting test run statistics and to improve their code using those interpretations.
Part 1
Part 2
Part 3
Part 4
Part 5
]]></description>
		<wfw:commentRss>http://www.multicoreinfo.com/2010/08/superscalar2/feed/</wfw:commentRss>
		</item>
		<item>
		<title>ParBenCCh 1.0 Parallel C++ Benchmarking Suite</title>
		<link>http://www.multicoreinfo.com/2010/08/parbencch/</link>
		<comments>http://www.multicoreinfo.com/2010/08/parbencch/#comments</comments>
		<pubDate>Tue, 31 Aug 2010 11:11:39 +0000</pubDate>
		<dc:creator>Sujana</dc:creator>
		
		<category><![CDATA[MulticoreInfo]]></category>

		<guid isPermaLink="false">http://www.multicoreinfo.com/?p=9284</guid>
		<description><![CDATA[The ParBenCCh suite is a collection of small C and C++ applications designed to characterize compiler optimization capabilities, language support, object-oriented-programming style overhead, and machine performance. We have developed a testing framework using a virtual base class that encapsulates the essential functionality of any benchmark. Each of our specific tests derive from this base class [...]]]></description>
		<wfw:commentRss>http://www.multicoreinfo.com/2010/08/parbencch/feed/</wfw:commentRss>
		</item>
		<item>
		<title>Superscalar Programming with HyperThreading and Shared Cache Systems</title>
		<link>http://www.multicoreinfo.com/2010/08/superscalar1/</link>
		<comments>http://www.multicoreinfo.com/2010/08/superscalar1/#comments</comments>
		<pubDate>Tue, 31 Aug 2010 11:10:29 +0000</pubDate>
		<dc:creator>Sujana</dc:creator>
		
		<category><![CDATA[MulticoreInfo]]></category>

		<guid isPermaLink="false">http://www.multicoreinfo.com/?p=9282</guid>
		<description><![CDATA[by Jim Dempsey
This article examines superscalar programming techniques on HyperThread and Shared cache systems.
For background information, see the five-part article series on Superscalar Programming 101 (Matrix). That article series demonstrates superscalar techniques but does not fully demonstrate the relationship between running your HyperThread capable system with HyperThreading disabled verses HyperThreading enabled. This article focuses on [...]]]></description>
		<wfw:commentRss>http://www.multicoreinfo.com/2010/08/superscalar1/feed/</wfw:commentRss>
		</item>
		<item>
		<title>Improving the Efficiency of GPU Clusters</title>
		<link>http://www.multicoreinfo.com/2010/08/wp-eff-gpu/</link>
		<comments>http://www.multicoreinfo.com/2010/08/wp-eff-gpu/#comments</comments>
		<pubDate>Sun, 29 Aug 2010 01:34:43 +0000</pubDate>
		<dc:creator>Suren</dc:creator>
		
		<category><![CDATA[MulticoreInfo]]></category>

		<guid isPermaLink="false">http://www.multicoreinfo.com/?p=9279</guid>
		<description><![CDATA[Graphic Processing Units (GPUs) in High-Performance Computing (HPC), promise the prospect of dramatically increasing HPC performance.
However, as we all know, achieving real-world performance is about much more than just the raw-performance of underlying hardware. Similar to a highly-efficient power plant connected to a distribution network that loses 70% of its power in transmission, HPC GPU [...]]]></description>
		<wfw:commentRss>http://www.multicoreinfo.com/2010/08/wp-eff-gpu/feed/</wfw:commentRss>
		</item>
		<item>
		<title>Performance Optimization for the Atom Architecture</title>
		<link>http://www.multicoreinfo.com/2010/08/perf-atom/</link>
		<comments>http://www.multicoreinfo.com/2010/08/perf-atom/#comments</comments>
		<pubDate>Fri, 27 Aug 2010 01:08:41 +0000</pubDate>
		<dc:creator>Sujana</dc:creator>
		
		<category><![CDATA[MulticoreInfo]]></category>

		<guid isPermaLink="false">http://www.multicoreinfo.com/?p=9277</guid>
		<description><![CDATA[By Lori Matassa and Max Domeika
The focus of multi-core processor tuning is on the effective use of parallelism 
ood software design seeks a balance between simplicity and efficiency. Performance of the application is an aspect of software design; however correctness and stability are typically prerequisite to extensive performance tuning efforts. A typical development cycle is [...]]]></description>
		<wfw:commentRss>http://www.multicoreinfo.com/2010/08/perf-atom/feed/</wfw:commentRss>
		</item>
		<item>
		<title>The Growing Software Challenge: From Stacks To SMP</title>
		<link>http://www.multicoreinfo.com/2010/08/software-challenge/</link>
		<comments>http://www.multicoreinfo.com/2010/08/software-challenge/#comments</comments>
		<pubDate>Fri, 27 Aug 2010 01:06:53 +0000</pubDate>
		<dc:creator>Sujana</dc:creator>
		
		<category><![CDATA[MulticoreInfo]]></category>

		<guid isPermaLink="false">http://www.multicoreinfo.com/?p=9275</guid>
		<description><![CDATA[By Ann Steffora Mutschler
Building a system now includes software, but defining the software stack is a mounting challenge for engineers. What used to be almost exclusively drivers now includes RTOSes and OSes, executable files, middleware, firmware, IP, embedded software and applications.
With millions of different embedded products, all with different sets of software, it comes down [...]]]></description>
		<wfw:commentRss>http://www.multicoreinfo.com/2010/08/software-challenge/feed/</wfw:commentRss>
		</item>
		<item>
		<title>Ubiquitous High Performance Computing</title>
		<link>http://www.multicoreinfo.com/2010/08/uhpc/</link>
		<comments>http://www.multicoreinfo.com/2010/08/uhpc/#comments</comments>
		<pubDate>Fri, 27 Aug 2010 01:05:50 +0000</pubDate>
		<dc:creator>Sujana</dc:creator>
		
		<category><![CDATA[MulticoreInfo]]></category>

		<guid isPermaLink="false">http://www.multicoreinfo.com/?p=9273</guid>
		<description><![CDATA[LSU research group part of DARPA project to create advanced computing systems
A research group with LSU’s Center for Computation &#038; Technology (CCT), has received two awards to provide fundamental technical contributions to the recently announced Defense Advanced Research Projects Agency (DARPA) Ubiquitous High Performance Computing Program (UHPC). This program brings together researchers and scientists from [...]]]></description>
		<wfw:commentRss>http://www.multicoreinfo.com/2010/08/uhpc/feed/</wfw:commentRss>
		</item>
		<item>
		<title>Low Energy Supercomputing at SC10</title>
		<link>http://www.multicoreinfo.com/2010/08/low-energy-sc/</link>
		<comments>http://www.multicoreinfo.com/2010/08/low-energy-sc/#comments</comments>
		<pubDate>Thu, 26 Aug 2010 14:55:04 +0000</pubDate>
		<dc:creator>Sujana</dc:creator>
		
		<category><![CDATA[MulticoreInfo]]></category>

		<guid isPermaLink="false">http://www.multicoreinfo.com/?p=9271</guid>
		<description><![CDATA[The term “supercomputing” usually evokes images of large, expensive computer systems that calculate unfathomable algorithms and run on enough energy to support a small city. Now, imagine a supercomputer, but run on the electrical equivalent of three standard-size coffee-makers.
This year’s international supercomputing conference, SC10, will feature the Student Cluster Competition that challenges students to build, [...]]]></description>
		<wfw:commentRss>http://www.multicoreinfo.com/2010/08/low-energy-sc/feed/</wfw:commentRss>
		</item>
		<item>
		<title>China&#8217;s Godson processor gets vector boost, aims for 28 nm</title>
		<link>http://www.multicoreinfo.com/2010/08/godson/</link>
		<comments>http://www.multicoreinfo.com/2010/08/godson/#comments</comments>
		<pubDate>Thu, 26 Aug 2010 10:55:02 +0000</pubDate>
		<dc:creator>Sujana</dc:creator>
		
		<category><![CDATA[MulticoreInfo]]></category>

		<guid isPermaLink="false">http://www.multicoreinfo.com/?p=9269</guid>
		<description><![CDATA[A chief architect of China&#8217;s microprocessor initiative described an ambitious set of new Godson CPUs including a server chip with vector processing. Wei-wu Hu, a professor at Beijing&#8217;s Institute of Computing Technology that has led development of the chips, announced several new 65 nm parts debuting in 2011 and plans to leapfrog to a 28-nm [...]]]></description>
		<wfw:commentRss>http://www.multicoreinfo.com/2010/08/godson/feed/</wfw:commentRss>
		</item>
		<item>
		<title>AMD Blazes New Path with Bulldozer</title>
		<link>http://www.multicoreinfo.com/2010/08/amd-blazes/</link>
		<comments>http://www.multicoreinfo.com/2010/08/amd-blazes/#comments</comments>
		<pubDate>Thu, 26 Aug 2010 10:50:28 +0000</pubDate>
		<dc:creator>Sujana</dc:creator>
		
		<category><![CDATA[MulticoreInfo]]></category>

		<guid isPermaLink="false">http://www.multicoreinfo.com/?p=9267</guid>
		<description><![CDATA[by Michael Feldman, HPCwire Editor 
Now that AMD has jettisoned its chip production business with the Globalfoundries spinoff, it can concentrate on what it has always done best: microprocessor design. Much of its success early in the decade resulted from outmaneuvering Intel, its much larger rival, in the lucrative x86 server space. With the Opteron [...]]]></description>
		<wfw:commentRss>http://www.multicoreinfo.com/2010/08/amd-blazes/feed/</wfw:commentRss>
		</item>
		<item>
		<title>AMD Unveils the Next Generation: Bulldozer, Bobcat and Hybrid Chips</title>
		<link>http://www.multicoreinfo.com/2010/08/amd-future/</link>
		<comments>http://www.multicoreinfo.com/2010/08/amd-future/#comments</comments>
		<pubDate>Thu, 26 Aug 2010 10:46:10 +0000</pubDate>
		<dc:creator>Sujana</dc:creator>
		
		<category><![CDATA[MulticoreInfo]]></category>

		<guid isPermaLink="false">http://www.multicoreinfo.com/?p=9264</guid>
		<description><![CDATA[It&#8217;s been a long time since the last major AMD microarchitecture refresh, and in the meantime, Intel&#8217;s handily won the performance  crown. The second-place chipmaker hasn&#8217;t spent its time idly, working instead on their first entirely-new x86 chips in close to a decade.
For AMD, Bulldozer and Bobcat are the future. Are they right?
As the [...]]]></description>
		<wfw:commentRss>http://www.multicoreinfo.com/2010/08/amd-future/feed/</wfw:commentRss>
		</item>
		<item>
		<title>Boosting Performance with Atomic Operations in .NET 4</title>
		<link>http://www.multicoreinfo.com/2010/08/boosting-net4/</link>
		<comments>http://www.multicoreinfo.com/2010/08/boosting-net4/#comments</comments>
		<pubDate>Tue, 24 Aug 2010 18:31:24 +0000</pubDate>
		<dc:creator>Sujana</dc:creator>
		
		<category><![CDATA[MulticoreInfo]]></category>

		<guid isPermaLink="false">http://www.multicoreinfo.com/?p=9262</guid>
		<description><![CDATA[by Gaston Hillar
When you write concurrent code that has to make changes to shared variables, you might think that a mutual-exclusion lock is necessary to perform each update operation. In some cases, you can replace a mutual-exclusion lock with a more efficient atomic operation and you can boost both your application&#8217;s performance and scalability.
When you [...]]]></description>
		<wfw:commentRss>http://www.multicoreinfo.com/2010/08/boosting-net4/feed/</wfw:commentRss>
		</item>
		<item>
		<title>Locate a Hotspot and Optimize It: Intel Parallel Studio Evaluation Guide</title>
		<link>http://www.multicoreinfo.com/2010/08/hotspot/</link>
		<comments>http://www.multicoreinfo.com/2010/08/hotspot/#comments</comments>
		<pubDate>Tue, 24 Aug 2010 15:24:37 +0000</pubDate>
		<dc:creator>Sujana</dc:creator>
		
		<category><![CDATA[MulticoreInfo]]></category>

		<category><![CDATA[Performance]]></category>

		<guid isPermaLink="false">http://www.multicoreinfo.com/?p=9258</guid>
		<description><![CDATA[Two Easy Steps to Better Performance
Step 1. Find the hotspot(s): Measure where the application is spending time
In order to tune effectively, you must optimize the parts of the applications that demand a lot of time. Tune something that is already fast, and you will see very little benefit. A “hotspot” is a place where
the app [...]]]></description>
		<wfw:commentRss>http://www.multicoreinfo.com/2010/08/hotspot/feed/</wfw:commentRss>
		</item>
		<item>
		<title>Intel Now Shipping Dual Core Atom N550</title>
		<link>http://www.multicoreinfo.com/2010/08/atom-n550/</link>
		<comments>http://www.multicoreinfo.com/2010/08/atom-n550/#comments</comments>
		<pubDate>Tue, 24 Aug 2010 11:22:10 +0000</pubDate>
		<dc:creator>Sujana</dc:creator>
		
		<category><![CDATA[MulticoreInfo]]></category>

		<guid isPermaLink="false">http://www.multicoreinfo.com/?p=9255</guid>
		<description><![CDATA[Intel on Monday introduced its second dual-core Atom processor, and announced that more than a half dozen computer makers have signed on to ship netbooks with the latest low-power chip.
The 1.5 GHz N550 is built on the Pine Trail Atom platform, introduced last year, and is a higher-performing alternative to the single-core N450 used in [...]]]></description>
		<wfw:commentRss>http://www.multicoreinfo.com/2010/08/atom-n550/feed/</wfw:commentRss>
		</item>
		<item>
		<title>Inside AMD&#8217;s two new x86 Bulldozer and Bobcat cores</title>
		<link>http://www.multicoreinfo.com/2010/08/bulldozer-bc/</link>
		<comments>http://www.multicoreinfo.com/2010/08/bulldozer-bc/#comments</comments>
		<pubDate>Tue, 24 Aug 2010 11:18:02 +0000</pubDate>
		<dc:creator>Sujana</dc:creator>
		
		<category><![CDATA[MulticoreInfo]]></category>

		<guid isPermaLink="false">http://www.multicoreinfo.com/?p=9253</guid>
		<description><![CDATA[by Rick Merritt
Advanced Micro Devices will make its first public presentations on Bulldozer and Bobcat today (Aug. 24), its first new x86 cores designed from a clean sheet of paper in ten years. The cores will form the underpinning of most of the products AMD will build over the next five to ten years to [...]]]></description>
		<wfw:commentRss>http://www.multicoreinfo.com/2010/08/bulldozer-bc/feed/</wfw:commentRss>
		</item>
		<item>
		<title>Maximizing Fabric Efficiency in HPC Clusters</title>
		<link>http://www.multicoreinfo.com/2010/08/hpc-efficiency/</link>
		<comments>http://www.multicoreinfo.com/2010/08/hpc-efficiency/#comments</comments>
		<pubDate>Tue, 24 Aug 2010 01:40:26 +0000</pubDate>
		<dc:creator>Sujana</dc:creator>
		
		<category><![CDATA[MulticoreInfo]]></category>

		<guid isPermaLink="false">http://www.multicoreinfo.com/?p=9251</guid>
		<description><![CDATA[by Lloyd Dickman 
High-performance computing users invest in performance-oriented interconnect fabrics such as InfiniBand to provide adequate system balance to match the computational capabilities of modern multi-core processors and GPUs. However, as HPC system sizes continue to grow with at least hundreds of nodes, thousands of cores and numerous simultaneous jobs, users are increasingly sensitive [...]]]></description>
		<wfw:commentRss>http://www.multicoreinfo.com/2010/08/hpc-efficiency/feed/</wfw:commentRss>
		</item>
		<item>
		<title>Freescale Boosts its Power-Efficient QorIQ Comm Processors</title>
		<link>http://www.multicoreinfo.com/2010/08/freescale-2/</link>
		<comments>http://www.multicoreinfo.com/2010/08/freescale-2/#comments</comments>
		<pubDate>Tue, 24 Aug 2010 01:38:47 +0000</pubDate>
		<dc:creator>Sujana</dc:creator>
		
		<category><![CDATA[MulticoreInfo]]></category>

		<guid isPermaLink="false">http://www.multicoreinfo.com/?p=9249</guid>
		<description><![CDATA[Freescale Semiconductor introduces three new QorIQ processors, which for the first time incorporate the company’s advanced Data Path Acceleration Architecture (DPAA) programming model into QorIQ P1 and P2 level multicore products. The introduction of the P1023/1017 and P2040 communications processors extends Freescale’s DPAA technology to all QorIQ platform levels, spanning single-core to eight-core products and [...]]]></description>
		<wfw:commentRss>http://www.multicoreinfo.com/2010/08/freescale-2/feed/</wfw:commentRss>
		</item>
		<item>
		<title>NSF funds computer design variabilty project</title>
		<link>http://www.multicoreinfo.com/2010/08/variabilty/</link>
		<comments>http://www.multicoreinfo.com/2010/08/variabilty/#comments</comments>
		<pubDate>Fri, 20 Aug 2010 10:19:41 +0000</pubDate>
		<dc:creator>Sujana</dc:creator>
		
		<category><![CDATA[MulticoreInfo]]></category>

		<guid isPermaLink="false">http://www.multicoreinfo.com/?p=9247</guid>
		<description><![CDATA[The National Science Foundation awarded a $10 million, five-year grant to researchers to explore a new paradigm for the way hardware and software interface in order to potentially reduce by as much as 40 percent the energy cost of computing.
The research team seeks to develop computing systems that will be able to sense the nature [...]]]></description>
		<wfw:commentRss>http://www.multicoreinfo.com/2010/08/variabilty/feed/</wfw:commentRss>
		</item>
		<item>
		<title>A GPU on Every Chip</title>
		<link>http://www.multicoreinfo.com/2010/08/gpu-chip/</link>
		<comments>http://www.multicoreinfo.com/2010/08/gpu-chip/#comments</comments>
		<pubDate>Fri, 20 Aug 2010 10:16:21 +0000</pubDate>
		<dc:creator>Sujana</dc:creator>
		
		<category><![CDATA[MulticoreInfo]]></category>

		<guid isPermaLink="false">http://www.multicoreinfo.com/?p=9245</guid>
		<description><![CDATA[by Michael Feldman
Alongside multicore CPUs and cloud computing, GPGPU is a technology that will continue to shake up the way computing is done for years to come. To the general public, the GPGPU phenomenon is probably the least visible of the three I mentioned, but it may end up having just as much of an [...]]]></description>
		<wfw:commentRss>http://www.multicoreinfo.com/2010/08/gpu-chip/feed/</wfw:commentRss>
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		<item>
		<title>Nvidia-based Cheap Supercomputing Coming to an End</title>
		<link>http://www.multicoreinfo.com/2010/08/cheap-comp-end/</link>
		<comments>http://www.multicoreinfo.com/2010/08/cheap-comp-end/#comments</comments>
		<pubDate>Thu, 19 Aug 2010 19:27:17 +0000</pubDate>
		<dc:creator>Sujana</dc:creator>
		
		<category><![CDATA[MulticoreInfo]]></category>

		<guid isPermaLink="false">http://www.multicoreinfo.com/?p=9243</guid>
		<description><![CDATA[by Greg Pfister on August 11th 2010
Nvidia&#8217;s CUDA has been hailed as &#8220;Supercomputing for the Masses,&#8221; and with good reason. Amazing speedups on scientific / technical code have been reported, ranging from a mere 10X through hundreds. It&#8217;s become a darling of academic computing and a major player in DARPA&#8217;s Exascale program, but performance alone [...]]]></description>
		<wfw:commentRss>http://www.multicoreinfo.com/2010/08/cheap-comp-end/feed/</wfw:commentRss>
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		<item>
		<title>Which comes first: parallel languages or parallel programming patterns?</title>
		<link>http://www.multicoreinfo.com/2010/08/lang-patterns/</link>
		<comments>http://www.multicoreinfo.com/2010/08/lang-patterns/#comments</comments>
		<pubDate>Thu, 19 Aug 2010 19:21:38 +0000</pubDate>
		<dc:creator>Sujana</dc:creator>
		
		<category><![CDATA[MulticoreInfo]]></category>

		<guid isPermaLink="false">http://www.multicoreinfo.com/?p=9241</guid>
		<description><![CDATA[By Clay Breshears
On the shuttle to the recent UPCRC (Universal Parallel Computation Research Center) Annual Summit meeting on the Microsoft campus in Redmond, WA, I was listening in on a discussion about parallel programming patterns.  Being a parallel programmer, I was interested in what people (and these were some of the experts in the [...]]]></description>
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