by Mahesha Pandit
“The Multicore Challenge II - Programming The multicore” was held on 5th September 2011 at Bristol. Eight speakers explored different dimensions of the multicore challenge and opportunities it brings about.
The presentation slides are available here. (You may have to join the Scalable Computing Group to access them.)

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by Paul Stravers, Vector Fabrics
In this product how-to article, Vector Fabrics’ Paul Stavers describes a more efficient way to parallelize code for embedded multicore designs illustrating the process using the company’s online tool to parallelize Google’s VP8 video decoder.
Many silicon vendors rely on multicore architectures to improve performance. However, some engineers might say that [...]

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by Shameem Akhter, Jason Roberts, and Andrew Binstock
For multithreaded software to run optimally, developers must understand subtle aspects of memory access
Parallel programming is gaining favor as the multicore architecture becomes ubiquitous. On processors based on the x86 architecture, running threads in parallel presents memory problems beyond the typical concerns of keeping threads from interfering with [...]

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Intelligence In Software: S/W Dev Tools & Tips
Taming the Parallel Beast
By John Pieper for Intelligence In Software

Many programmers seem to think parallelism is hard. A quick Internet search will yield numerous blogs commenting on the difficulty of writing parallel programs (or parallelizing existing serial code). There do seem to be many challenges for novices. Here’s [...]

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Tim Stitt, Ph.D. is a HPC Support Scientist with the Swiss National Supercomputing Centre (CSCS). He wrote an article (or module) on CNX Connections web site introducing PGAS programming model.
Summary:
This module introduces the Partitioned Global Address Space (PGAS) programming paradigm. This paradigm provides both a data and execution model that has the potential to [...]

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by Roni Simonian, Ariadne
This Multicore Expo paper accompanies the class “ME820: Make your multicore program fail again” to be held on May 3, 2011 in San Jose, CA. Multicore Expo, May 2 to 4, will be held in conjunction with the Embedded Systems Conference Silicon Valley 2011.
What makes debugging of multiprocess and multithread applications [...]

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by Aaron Spear, VMware
Modern multi-core designs often aggregate wildly different hardware and software technologies. Traditional debuggers, which show a snapshot of a portion of the system, do little to uncover issues that arise due to complex interaction of components.
Engineers routinely cobble together proprietary tracing facilities in order to have some chance of catching [...]

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by Suzanne Rivoire, Sonoma State University, Rohnert Park, CA, USA
The technique of scaling hardware performance through increasing the number of cores on a chip requires programmers to learn to write parallel code that can exploit this hardware. In order to expose students to a variety of multicore programming models, our university offered a breadth-first introduction [...]

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By Kathy Farrel
Peter Pacheco is Professor of Computer Science and Mathematics at the University of San Francisco
His main research interest is parallel computing. He’s been involved in the development of the MPI Standard for message-passing. His book “Parallel Programming with MPI” is an elementary introduction to programming parallel systems that use the MPI [...]

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July 25-29, 2011
Siebel Center for Computer Science
University of Illinois at Urbana-Champaign
The 2011 UPCRC Illinois Summer School offers experienced programmers, with little or no exposure to parallelism, an opportunity to learn about multicore programming.

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This article originally posted on August 24, 2009. Since then, OpenCL gained a lot of popularity and a number of tutorials and sample codes have been developed. In this article, we update the original article with recent resources and removing any dead links.
We provided many resources on parallel programming tutorials. The following are the ones [...]

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By Victor J. Duvanenko
Improving the algorithm via performance measurement
In last month’s article in this series, a Parallel Merge algorithm was introduced and performance was optimized to the point of being limited by system memory bandwidth. Of course, the natural next step is to use it as a core building block for Parallel Merge Sort, since [...]

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by Gilles Pokam, Cristiano Pereira, Klaus Danne (Intel Labs), Lynda Yang, Samuel T. King, and Josep Torrellas (UIUC)
Abstract
As multi-processors become mainstream, software developers must harness the parallelism available in programs to keep up with multi-core performance. Writing parallel programs, however, is notoriously difficult, even for the most advanced programmers. The main reason for this lies [...]

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by Richard Gerber and Andrew Binstock
Abstract
Due to the architecture of modern processors, and the tendency to to attempt pre-execution of known independent blocks of code, multi-threaded and parallel programming can be a tricky adventure. It becomes imperative that the developer is aware of certain processor-level issues that may adversely impact the performance of a multi-threaded [...]

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by Bratin Saha, Xiaocheng Zhou, Hu Chen, Ying Gao, Shoumeng Yan, and Sai Luo
Abstract
The client computing platform is moving towards a heterogeneous architecture that consists of a combination of cores focused on scalar performance, and of a set of throughput-oriented cores. The throughput-oriented cores (such as those in the Intel® microarchitecture codename Larrabee processor) may [...]

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by Kurt Keutzer and Tim Mattson, Intel Corporation
Abstract
The key to writing high-quality parallel software is to develop a robust software design. This applies not only to the overall architecture of the program, but also to the lower layers in the software system where the concurrency and how it is expressed in the final program is [...]

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by Shameem Akhter and Jason Roberts, Intel Corporation
Abstract
Error diffusion in image and graphics processing programs represents an excellent example of a problem which at first may seem resistant to a multi-threaded approach, but upon further review will actually lend itself well to speed up possibilities. Using the Floyd-Steinberg algorithm for error diffusion, the trick lies [...]

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by Shameem Akhter and Jason Roberts, Intel Corporation
Abstract
The major CPU vendors are shifting gears, choosing to add parallelism support on-chip with multi-core processors in order to avoid many of the technological hurdles in boosting speeds, while still offering a better performing processor. However, if your software does not take advantage of these multiple cores, it [...]

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by Shameem Akhter and Jason Roberts, Intel Corporation
Abstract
This article describes the theory and practice of the principal parallel programming constructs that focus on threading and begins with the fundamental concepts of synchronization, critical section, and deadlock. It will discuss common issues associated with these concepts, as well as classical problems in the area of threading.

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by Shameem Akhter and Jason Roberts, Intel Corporation
Abstract
Parallel programming has been around for decades, though before the advent of multi-core processors, it was an esoteric discipline. Numerous programmers have tripped over the common stumbling blocks by now. By recognizing these problems you can avoid stumbling. Furthermore, it is important to understand the common problems before [...]

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