Paper submission deadline for IEEE Computer Special Issue on Tools and Environments for Multi- and Many-Core Architectures is extended to March 31, 2009.
For submission instructions, please visit http://www.computer.org/portal/pages/computer/content/author.html
To submit, go to https://mc.manuscriptcentral.com/cs-ieee.
More details on the special issue can be found here.
Multicore Research Papers

[Read more →]

By Rickey C. Weisner, Sun Microsystems Inc.
Modern systems architectures are making increasing use of Chip Multithreading (CMT) and multiple cores per socket to increase available computing power using minimal space, power, and cooling. This article discusses the challenges involved in enabling legacy applications to scale on CMT architectures in particular and on multicore architectures in [...]

[Read more →]

Jost Berthold of Philipps-Universitat, Marburg, Germany and his colleagues have submitted a paper comparing and optimizing parallel Haskell implementations for multicore. They provide a draft version of the paper online. Here is the abstract of that paper:
Abstract
“In this paper, we investigate the differences and tradeoffs imposed by two parallel Haskell dialects running on multicore machines. [...]

[Read more →]

Special Issue for IEEE Computer of “Tools and Environments for Multi- and Many-Core Architectures” solicit research contributions. The purpose of this special issue is to present the latest advances in next-generation tools and environments for multi- and many-core architectures. The special issue solicit contributions in areas including, but not limited to:
1. Programming models and environments [...]

[Read more →]

by Ed Burnette on ZDNet
“The second day of the PPoPP 2009 conference started with a controversial keynote by Yale Patt from the University of Texas at Austin. It was so controversial, for me at least, that I decided to wait a few days to calm down before writing about it. He had three main points: [...]

[Read more →]

14th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP 2009) and 15th International Symposium on High-Performance Computer Architecture (HPCA-15) are being held in Raleigh, North Carolina from Feb 14th to 18th. Their technical programs are loaded with interesting research papers and keynote speeches related to multicore processors. Here’s a list of keynote [...]

[Read more →]

Despite recent layoffs and fab closings, Intel Corp. remains on track to deliver its first 32nm processors before the end of the year. The update came as part of a conference call previewing some of the papers the processor giant will present at next week’s International Solid-State Circuits Conference (ISSCC).
“The 32 nm technology is getting [...]

[Read more →]

Here is a paper that talks about wait-free programming for general purpose computations on graphics
processors. This was published at Annual ACM Symposium on Principles of Distributed Computing archive Proceedings.
Abstract
This paper aims at bridging the gap between the lack of synchronization mechanisms in recent graphics processor (GPU) architectures and the need of synchronization mechanisms in parallel [...]

[Read more →]

insideHPC provides a link to a list of multicore papers that are being briefed at American Geophysical Union’s Fall Meeting, which is going on right now in San Francisco.
The list includes the following papers.
* Harnessing Petaflop-Scale Multi-Core Supercomputing for Problems in Space Science
* Accelerate Climate Models with the IBM Cell Processor
* Geospace simulations on the [...]

[Read more →]

Daniel J. Ernst and Daniel E. Stevenson from the Department of Computer Science of the University of Wisconsin, Eau Claire have presented the paper titled, “Concurrent CS: Preparing Students for a Multicore World” at Annual Joint Conference Integrating Technology into Computer Science Education.
Here’s the abstract of that paper.
Current trends in microprocessor design are fundamentally [...]

[Read more →]

Multicore Days 2008 workshop held in Spetember (11-12) features leading international and Swedish experts from industry and academia, who will present the cutting edge of multicore computing technologies.
Multicore processors are replacing single core processors in servers, personal computers and embedded systems alike. To leverage multicore, all software must be parallel. The workshop’s program tried [...]

[Read more →]

The fast pace of growing computing power could be sustained for many years to come thanks to new research from the UK’s National Physical Laboratory (NPL) that is applying advanced techniques to magnetic semiconductors.
Moore’s Law observed that the density of transistors on an integrated circuit doubles every two years. Components have shrunk over time to [...]

[Read more →]

First Swedish Workshop on Multicore Computing (MCC) 2008 (www.bth.se/mcc08) was held in in Ronneby between November 27-28.
The objective of this workshop is to bring together researchers and practitioners from academia and industry in Sweden to present and discuss the recent work in the area of multi-core computing. The workshop is organized as an activity [...]

[Read more →]

Here is a paper that was presented at Workshop on Design, Architecture, and Simulation of Chip Multi-Processors (dasCMP 2008), which was held in conjunction with the 41st Annual International Symposium on Microarchitecture (MICRO).
Authors:Monchiero, Matteo; Ahn, Jung Ho; Falcón, Ayose; Ortega, Daniel; Faraboschi, Paolo (HP Laboratories)
Abstract of the paper:
This paper proposes a novel methodology to [...]

[Read more →]

Here is the abstract and the link to slides of a Keynote Speech by Charles Moore of AMD at The 41st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), 2008.
Charles Moore is a Senior Fellow at Advanced Micro Devices, and currently the Chief Architect of AMD’s Accelerated Computing Initiative. In recent years, he has been [...]

[Read more →]

The First International Forum on Next-Generation Multicore/Manycore Technologies (IFMT’08) will be held in Cairo, Egypt on November 24-25 2008. Here is a selected list of interesting talks and link to advanced program of the technical session.
Keynote Speech 1: The Software Challenges of Multicore: Lessons from Supercomputing by Tarek El-Ghazawi
Dynamic Power Management Framework for Multi-Core Portable [...]

[Read more →]

The SC Conference is the premier international conference for high performance computing (HPC), networking, storage and analysis. SC08 was held in Austin, TX (November 15-21) celebrated the 20th anniversary of the first SC Conference, then called Supercomputing, held in Orlando, Florida in 1988. There were more than 10,000 attendants and an excellent technical program. SC08 [...]

[Read more →]

Intel Technology Journal publishes an article, where the authors introduce the 45 nm Intel® Core™ Microarchitecture and discuss improvements in SSE4.1 instructions, larger caches, faster divide techniques, and better load balancing across cache boundaries.
Abstract of the Paper:
The 45nm Intel® Core™2 family of processors, codename PenrynΔ, improves upon the performance of Intel Core 2 processors through [...]

[Read more →]

Embedded real-time applications in communication systems require high processing power. Manual scheduling devel-oped for single-processor applications is not suited to multi-core architectures. The Algorithm Architecture Matching (AAM) methodology optimizes static application implementation on multi-core architectures. The Random Access Channel Preamble Detection (RACH-PD) is an algorithm for non-synchronized access of Long Term Evolu-tion (LTE) wireless networks. [...]

[Read more →]

Peter Tröger published a Technical Report discussing the trends and challenges of Multi-core Era including parallel hardware and parallel software. Here is the abstract of the report.
“Since the very beginning of hardware development, computer processors were invented with ever-increasing clock frequencies and sophisticated in-build optimization strategies. Due to physical limitations, this ‘free lunch’ of speedup [...]

[Read more →]