by Shameem Akhter and Jason Roberts, Intel Corporation
Abstract
Parallel programming has been around for decades, though before the advent of multi-core processors it was more of an esoteric discipline. Now, numerous programmers have tripped over the common stumbling blocks and by recognizing these problems - and knowing how to manage them - you can avoid the [...]

[Read more →]

by Shameem Akhter and Jason Roberts, Intel Corporation
Abstract
Parallel programming has been around for decades, though before the advent of multi-core processors, it was more of an esoteric discipline. Now that numerous programmers have tripped over the common stumbling blocks, you can benefit from their experience by understanding the common problems before designing a parallel program. [...]

[Read more →]

by Shameem Akhter and Jason Roberts, Intel Corporation
Abstract
When programming for multiple thread or multiple core systems, it is important to realize the fundamental difference in memory allocation and access necessary from that of a single thread or core system. Contention and sharing with respect to memory locations can severely reduce the speedup gained from programming [...]

[Read more →]

by Richard Gerber, Aart J.C. Bik, Kevin B. Smith, and Xinmin Tian, Intel Corporation
Abstract
Automatic vectorization of code can fail for many reasons. Due to the fact that the compiler often assumes worst case scenarios, a simple fix is often all that is necessary to ensure that vectorization can be completed. By using diagnostics tools integrated [...]

[Read more →]

by Vincent Zimmer, Michael Rothman, and Suresh Marisetty, Intel Corporation
ABSTRACT: The modern day BIOS is one that has survived in essence for more than 25 years. However, the program and instructions themselves have been changed and adapted to match the ever quickening pace of technological advancement so much to be almost unrecognizable from its origins. [...]

[Read more →]

by Vincent Zimmer, Michael Rothman, and Suresh Marisetty
Abstract
RAS is a critical requirement for enterprise class servers, which includes high availability server platforms. System uptime is measured against the goal of “five nines,” which represents 99.999 percent availability. One of the key aims of manageability software is to help achieve this goal, by implementation functions like [...]

[Read more →]

by Vincent Zimmer, Michael Rothman, and Suresh Marisetty, Intel Corporation
ABSTRACT: The need for a boot solution that is low cost, has a small footprint, offers low boot latencies, and is platform-agnostic is an ever growing one that is becoming more urgent with the increased ubiquity of consumer electronics. This also creates opportunities for CE device [...]

[Read more →]

by Stewart Taylor, Intel Corporation
Abstract
This article provides an introduction to video compression and decompression algorithms, including two popular specifications for video compression, and the handling of video compression in the Intel® Integrated Performance Primitives (Intel® IPP).
Overview of Coding
Image and video encoders and decoders, in software called codecs, are intended to compress their media for storage [...]

[Read more →]

by Richard Gerber, Aart J.C. Bik, Kevin B. Smith, and Xinmin Tian, Intel Corporation
Parallelization using threads on multiple logical processors is an attractive and effective way to optimize software. As technologies to simulate multiple processors (such as Intel’s Hyper Threading technology) and processors containing multiple cores become the standard for even consumer level computing, the [...]

[Read more →]

by Andrew Binstock, Pacific Data Works LLC
Abstract
The issue of porting an application from a 32-bit environment to a 64-bit environment, like Intel EM64T, can be a complicated and involved one. However, as with any programming project, careful planning and execution can alleviate most problems that would otherwise arise. Experience in porting to a 64-bit platform [...]

[Read more →]

by Lori Matassa and Max Domeika, Intel Corporation
Endianness describes how multi-byte data is represented by a computer system and is dictated by the CPU architecture of the system. Unfortunately not all computer systems are designed with the same endian architecture. The difference in endian architecture is an issue when software or data is shared between [...]

[Read more →]

by Lori Matassa and Max Domeika, Intel Corporation (from the book Break Away with Intel® Atom™ Processors: A Guide to Architecture Migration)
The quality of tools support has a direct impact on the effectiveness of your optimization efforts. Performance tools that target single processor core performance provide insight into the application and how the application [...]

[Read more →]

by Lori Matassa and Max Domeika, Intel Corporation
Embedded platforms tend to be highly customized. In addition, they tend to be complex; in many cases they comprise a heterogeneous mix of different micro-engines and specialized architectures performing dedicated tasks. This functionality may be implemented at the platform level; however the trend is towards increasing levels of [...]

[Read more →]

by David Kleidermacher, Green Hills Software
Abstract
The motivations for system virtualization technology in the data center are well known, including resource optimization and improved service availability. But virtualization technology has broader applications throughout the enterprise and in the home, including security-enabled mobile devices, virtual appliances, secure servers, personal/corporate shared use laptops, trusted web-based transactions, and more. [...]

[Read more →]

by Aljosa Vrancic and Jeff Meisel
Abstract
Complex math is at the heart of many of the biggest technical challenges facing today’s engineers. With embedded multi-core processors, the type of calculations that would have traditionally required a supercomputer can now be performed at lower power in a real-time, embedded environment. This article presents findings that demonstrate how [...]

[Read more →]

# Intel Labs announced $100 million cash investment in U.S. university research over the next 5 years, marking a new model of collaboration for the organization.
# Funding will support a number of Intel Science and Technology Centers; the first such center will be led by Stanford University and focus on next-generation visual computing.
# This new [...]

[Read more →]

by David Martinez, Vasco Santos, Martin Mc Donnell, Ken Reynolds, and Peter Carlston, Intel Corporation
Abstract
The suitability of Intel® multi-core processors for embedded digital signal processing (DSP) applications is now being reevaluated. Major advances in power-efficient transistor technology, optimized multi-core processor microarchitectures and the evolution of Intel® Streaming SIMD Extensions (Intel® SSE) for vector processing have [...]

[Read more →]

by Gilles Pokam, Cristiano Pereira, Klaus Danne (Intel Labs), Lynda Yang, Samuel T. King, and Josep Torrellas (UIUC)
Abstract
As multi-processors become mainstream, software developers must harness the parallelism available in programs to keep up with multi-core performance. Writing parallel programs, however, is notoriously difficult, even for the most advanced programmers. The main reason for this lies [...]

[Read more →]

by Richard Gerber and Andrew Binstock
Abstract
Due to the architecture of modern processors, and the tendency to to attempt pre-execution of known independent blocks of code, multi-threaded and parallel programming can be a tricky adventure. It becomes imperative that the developer is aware of certain processor-level issues that may adversely impact the performance of a multi-threaded [...]

[Read more →]

by Bratin Saha, Xiaocheng Zhou, Hu Chen, Ying Gao, Shoumeng Yan, and Sai Luo
Abstract
The client computing platform is moving towards a heterogeneous architecture that consists of a combination of cores focused on scalar performance, and of a set of throughput-oriented cores. The throughput-oriented cores (such as those in the Intel® microarchitecture codename Larrabee processor) may [...]

[Read more →]