Sponsored Content by DataDirect Networks, published by HPCWire
With ISC 2012 happening next month in Hamburg, it is time to reflect on what those challenges are, and the progress being made to address them. Consider this short article a primer on what to look for at ISC’12 in terms of the presentations and developments that [...]

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Larry Hardesty, MIT News (published on Apr 10, 2012)
Computer chips have stopped getting faster. In order to keep increasing chips’ computational power at the rate to which we’ve grown accustomed, chipmakers are instead giving them additional “cores,” or processing units.
Today, a typical chip might have six or eight cores, all communicating with each other over [...]

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By Dan Olds, Gabriel Consulting, on The Register Blogs
Fusion-io nabbed prime real estate on the GTC 2012 exhibit floor – right inside the entryway. They took advantage of it by offering a hosted oxygen bar, complete with an oxygen bartender and a wide selection of coloured/flavoured airs. I got the lowdown on their offerings (it’s [...]

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by Shikhar Mohan Gupta for PCQuest
The terms used to differentiate server CPUs might appear as jargon to most. But each term is significant and represents the usage scenario for the CPU.
The first chip (CPU) was developed in 1971. Intel developed the first computer chip, the Intel 4004, and the first mainstream chip, the Intel [...]

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HPC Project introduces the 1.4 version of Par4All open parallelization platform extending its scope of processing and generating CUDA and OpenCL code.
This new version introduces enhancements for loop processing for CUDA and OpenCL kernel generations. Moreover, dependencies resulting from accesses to global variables are now more finely analyzed to assess parallelism.
Full Story
More on Par4All Features

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Vivante Corporation, a world-wide leader in graphics and visualization technologies for handheld and consumer devices, today announced Vivante GC Cores passed the Khronos(TM) Group OpenCL 1.1 Embedded Profile (EP) conformance test suite on Freescale’s i.MX 6 platform. The GC Cores use the latest programmable ScalarMorphic(TM) architecture to accelerate parallel data workloads on thousands of concurrent [...]

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By Rob Farber, (Published on April 10, 2012, Dr. Dobbs)
Will Intel’s Knights Corner chips function as co-processors like GPUs, or will they be stand-alone many-core Linux systems? The two approaches present very different performance profiles.
In September 2011, the Texas Advanced Computer Center (TACC) announced Stampede, a new 10-petaflops-capable (1016 or 10,000 trillion floating-point operations per [...]

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The AMD Embedded R-Series APU combines the new ‘Piledriver’ CPU architecture, an evolution of the ‘Bulldozer’ architecture, with discrete-class, DirectX 11-capable AMD Radeon 7000 Series graphics in a heterogeneous multicore embedded processing platform.

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by Clay Breshears (Intel) on Dr. Dobb’s Blogs
Ten years ago, multi-core processors were just on the horizon. Today they are mainstream and have become the impetus for a revolution in computer programming that can make best use of the two, four, six, or eight cores. Along with multi-core processors, we have seen the rise of [...]

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by Peter Mandl and Udeepta Bordoloi, AMD
Today’s graphics processors are highly programmable, massively parallel compute engines. In this role, they are commonly called general purpose graphics processing units, or GPGPUs. You can program them with the open and standard based OpenCL framework, distributing compute chores to CPUs, GPUs, and DSPs to optimise a system’s overall [...]

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Imperas today announced that its Open Virtual Platforms (OVP) OVPsim simulator and OVP Fast Processor Models have been integrated with NEC’s CyberWorkBench (CWB) SystemC cycle-accurate hardware models. OVP’s position as the de facto source of instruction accurate processor core models provides additional value to CyberWorkBench’s complete C/SystemC SoC design flow including ANSI-C/SystemC synthesis, hardware-software (HW/SW) [...]

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By Chris Mellor, The Register
The IT universe is seeing a massive collision taking place as the worlds of high-performance computing, big data and warehousing intermingle. IBM is pushing its General Parallel File System (GPFS) further to broaden its footprint in this space, with the 3.5 release adding big data and async replication features as well [...]

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Allinea Software today announced the launch of a new Allinea DDT CUDA Education pack, developed with experienced computer science lecturers to provide an exciting addition to CUDA lecture courses – the art of debugging CUDA.

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By Tim Anderson, The Register
Intel and NVIDIA are battling for the hearts and minds of developers in massively parallel computing.
Intel has been saying for years that concurrency rather than clock speed is the future of high performance computing, yet it has been slow to provide the mass of low-power, high-efficiency CPU cores needed to take [...]

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AMAX, a leading innovator of High Performance Computing (HPC), dynamic Enterprise IT, and custom Appliance Manufacturing solutions, today announced the next generation of AMAX ClusterMax SuperG GPU cluster solutions and ServMax GPU server platforms optimized for the latest NVIDIA(R) Tesla(TM) K10 GPU Accelerator. The new AMAX high performance GPU solutions powered by the Tesla(TM) K10 [...]

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Limit Point Systems, Inc. and MBA Sciences announce a strategic alliance establishing both parties’ intent to help customers in the oil and gas industry leverage parallel computing for exploration and production workflows. The alliance will provide workflow solutions that take advantage of both companies’ product portfolios.

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by John Barr, Research Director High Performance Computing, 451 Research
Source: HPCWire
While Thomas Sterling’s interview about the impossibility of reaching zettaflops made a lot of sense, the history of making negative predictions about technology is often an embarrassing one. Here are three examples:
“I think there is a world market for maybe five computers.”
Thomas Watson, chairman [...]

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from HPCWire
As supercomputing makes its way through the petascale era, the future of the technology has never seemed so uncertain. HPC veteran Thomas Sterling, Professor of Informatics & Computing at Indiana University, envisions some of the most critical developments in high performance computing, explaining why the transition to exascale is going to be [...]

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By Timothy Prickett Morgan, The Register
When Nvidia did a preview of its next-generation “Kepler” GPU chips back in March, the company’s top brass said that they were saving some of the goodies in the Kepler design for the big event at Nvidia’s GPU Technical Conference in San Jose, which runs this week. And true to [...]

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by Damon Poeter, PC Magazine
Jen-Hsun Huang thinks GPU computing is just starting to hit its stride. Kicking off the annual GPU Technology Conference in San Jose, Calif. on Tuesday, Nvidia’s president and chief executive promised that the company’s new Kepler architecture and thriving CUDA ecosystem would continue to “democratize high-performance computing as we know it.”
Nvidia’s [...]

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