AMD and Multicoreware Team to Help Developers Optimize the use of OpenCL™ for AMD Fusion APUs

SUNNYVALE, CA — April 27, 2011 —AMD today announced a new collaboration with Multicoreware, a leader in software solutions and tool development for multi-core and heterogeneous computing environments, to deliver an advanced set of tools for OpenCL™ optimization. [...]

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By Vaclav Pech
The GPars project makes concurrency easily accessible and safe to use on the JVM. In this article. I’ll focus on the actor model part of GPars. We’ll experiment with the various types of actors that GPars provides and see their typical usages. All the project‘s functionality is available from Java and from Groovy, [...]

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By Douglas Eadline, Ph.D.
Top500 List is very useful and provides a good historical record and “snapshot” or the HPC community. Problems with the list arise when the list is used for that which it was not intended. Quite often you will read “the X fastest computer in the world”, where X is a spot on [...]

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By Rik Myslewski
ARM Holdings’ high-performance, low-power Cortex-A15 processor design will appear in products in late 2012 or early 2013, when it will begin to muscle in on territory long dominated by Intel’s x86 architecture.
“With our upcoming Cortex-A15 processor, we are definitely moving closer to the day when your smartphone or tablet can act as a [...]

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By Noah Clemons
Part 1: Why vectorize?
In the previous blog, I gave a very fast crash course on the Cilk ‘for’. There are a few other ways you can manipulate that for loop, but I will go over that another time. The key is to understand what is possible first, get the basics running and parallelized, [...]

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by Chris Ault, Wind River
Many embedded systems are realizing the benefits of multi-core CPUs. These benefits include the ability to consolidate multiple distinct hardware boards on a single CPU, the ability to deliver more performance per Watt, as well as ability to quickly migrate existing designs to new processors and then use the additional [...]

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AMD today announced a new collaboration with Multicoreware, a leader in software solutions and tool development for multi-core and heterogeneous computing environments, to deliver an advanced set of tools for OpenCL™ optimization. The tools development effort accelerates software developers’ ability to create and optimize software that fully exploits the unique processing capability of AMD Fusion [...]

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Strong Customer Demand Drives Release of Prism Platform Support Packages for NetLogic Microsystems’ XLP(R), XLR(R) and XLS(R) Multi-Core Processor Families
CriticalBlue, a pioneer in embedded multicore software analysis, exploration and verification tools, announced today the immediate availability of support for NetLogic Microsystems’ industry-leading XLP(R), XLR(R), and XLS(R) multi-core processor families within its Prism product. Software developers [...]

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by David Kanter
In a recent article, we showed how to predict the performance of AMD and Nvidia GPUs. We built a straight forward model that uses the computational capabilities of the shader array (i.e. single precision GFLOP/s) to predict 3DMark Vantage GPU performance results. To keep things simple, we left out any multi-GPU solutions and [...]

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By Eric Brown
NetLogic Microsystems announced a new version of its Linux-ready XLP processor family that doubles the number of MIPS64 cores on board to 16. The XLP864 supports up to 2GHz clock rates and, with the help of more than 80 processing engines, enables 80Gbps throughput and 120 million packets-per-second (Mpps) performance, says the company.
The [...]

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By Edward J. Correia
With multicore processors now the norm, are your apps keeping up?
Updating your source code for speed on multithreaded systems is no longer an option. To stay competitive, solution providers must rewrite or optimize for today’s parallel systems. Whether you’re looking at modifying your existing single-core applications or starting over from scratch, there [...]

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Partha Ranganathan is Hewlett Packard’s Principal Investigator for HPs exascale datacenter project and is an expert on data center design. Modern data centers are not nearly as efficient as they could be and waste prodigious amounts of energy. Unless these inefficiencies are addressed, exascale supercomputers and data centers will never be feasible. In an interview [...]

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by Michael Wolfe, Compiler Engineer, The Portland Group, Inc.
In an earlier column, I discussed six levels of parallelism that we’ll have in exascale systems: node, socket, core, vector, instruction, and pipeline levels, and said that to reach exascale performance, we need to take advantage of all these levels, since the final performance is the product [...]

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By Asaf Shelly
As you may have already read in a previous post called Personal Review of Intel Under-NDA Sandy-Bridge Event I held the last session in an Intel-Under-NDA event. The presentation was called Performance and covered the different aspects of parallel computing and also the new Sandy Bridge AVX Instructions. I have introduced this [...]

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by Douglas Eadline for ClusterMonkey
The Processors report is part of the Intersect360 Site Census series and provides an examination of the processor use in systems found at a sample of HPC user sites. Intersect360 surveyed a broad range of users about their current computer system installations, storage systems, networks, middleware, and applications software supporting these [...]

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The U.S. Department of Energy announced today that proposals are now being accepted for the Innovative and Novel Computational Impact on Theory and Experiment (INCITE) program.
The U.S. Department of Energy announced today that proposals are now being accepted for the Innovative and Novel Computational Impact on Theory and Experiment (INCITE) program, which supports high-impact scientific [...]

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By Agam Shah
The Multicore Association is establishing specifications for a programming model that will reduce the complexity involved in writing software for multicore chips used in smartphones, tablets and other embedded systems.
The association is putting together a cohesive set of foundation APIs (application programming interfaces) to standardise communication, resource sharing and virtualisation spanning cores on [...]

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Lightworks, the world’s leading supplier of rendering solutions for developers of advanced 3D computer graphics software, is pleased to announce that the Company will be taking part in this year’s Congress On the Future of Engineering Software event (Cofes) in Scottsdale, Arizona.

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by Roni Simonian, Ariadne
This Multicore Expo paper accompanies the class “ME820: Make your multicore program fail again” to be held on May 3, 2011 in San Jose, CA. Multicore Expo, May 2 to 4, will be held in conjunction with the Embedded Systems Conference Silicon Valley 2011.
What makes debugging of multiprocess and multithread applications [...]

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by Andrey Marochko (Intel)
Well, maybe more essential than juicy, and rather treacherous than gory. As I noted in my previous blog introducing a major task scheduler extension – support for task and task group priorities, TBB has been steadily evolving ever since its inception. My recent interactions with a few teams using TBB both inside [...]

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