Around half of the personal computers shipping this year will drive displays using CPU-integrated graphics engines.
So says market watcher IHS iSuppli, and we’d not argue with its claim. Intel’s second-generation Core i processors and AMD’s Fusion chips, all have on-board GPUs, as does last year’s line of Core i parts.

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by Allen Holub
The first in a series of hands-on articles by Allen Holub about programming for the public cloud
A friend recently reported a conversation he had with one of those wide-eyed, gee-golly developers who’s half Techie and half Moonie. When asked what he was working on, the speaker came back with, “cloud cloud cloud cloud [...]

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by Anand Lal Shimpi
The transition to smaller form factors hasn’t been exclusively a client trend over the past several years, we’ve seen a similar move in servers. The motivation is very different however. In the client space it’s about portability, in the datacenter it’s about density. While faster multi-core CPUs have allowed the two-socket [...]

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by Douglas Eadline, Ph.D.
This little known “law” is a corollary to the more famous Moore’s Law of semiconductor growth.
All ARM designs give visions of small “cell phone” sized modules with 16-32 cores, 32 GBytes of memory, and maybe an SSD plugged into a high speed backbone network. Perhaps, SiCortex was on to something [...]

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Director of The National Center for Supercomputing Applications (NCSA) Thom Dunning gives the keynote address on the future of high performance computing at the summer school session on petascale computing.
Part 1

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by Jan Zverina
After only fifteen months, researchers using the Triton Resource,a medium-scale high performance computing system at the University of California San Diego’s San Diego Supercomputer Center (SDSC), are giving the system high marks for accelerating research across a wide variety of disciplines.
Designed primarily to support UC San Diego and UC researchers, Triton Resource [...]

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Bevin Brett, Principal Engineer and developer on the Intel(R) Parallel Advisor 2011 product, will be presenting on March 23rd at 9am PDT on the following topic:
Choosing Where To Introduce Parallelism
You can register for this presentation using the following link:

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by Sean Koehl
The government of Germany has presented Intel with an award for the development of our 48-core concept vehicle, the Single Chip Cloud Computer. The research chip won a German Innovation Prize for Climate and the Environment in the category “Environmentally Friendly Technologies.” The German Federal Ministry for the Environment, Nature Conservation and [...]

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by Gaston Hillar
The recently launched iPad 2 includes a 1 GHz dual-core Apple A5 SoC (short for System-on-a-Chip). If you want your iOS apps to take full advantage of this powerful dual-core chip, you have to use multicore programming techniques in these apps. If you code in Objective-C, the newest iOS versions allow you to [...]

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by Anton Shilov
AMD’s Fusion technology is finally here. At present AMD Fusion platforms only power low-end personal computers, in the coming months AMD will introduce Fusion chips for mainstream PCs. But what about the future of Fusion program? Will it power high-end desktops? Maybe next-generation game consoles? What advantages can Fusion bring to end users? [...]

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by David Sims
A recent study from Wind River, titled “Multi-core Network Acceleration Breakthrough Networking Performance with Optimized Software for Multi-core Processors” does a great job explaining a fairly difficult topic.
It “discusses the role multi-core software plays in achieving breakthrough network performance for networking applications,” noting that all the various multi-core processors available today offer performance [...]

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by John Brownlee
Computer chips continue to get smaller and that’s a good thing. A smaller chip is faster and more energy-efficient than a larger chip, while also being more affordable to produce. More to the point, as gadgets become smaller, chipmakers have to try to keep up. The problem is that while shrinking a chip [...]

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This Oracle white paper describes the application of Oracle VM Server for SPARC to implement high-capacity enterprise systems. Oracle Solaris CoolThreads technology combined with Oracle VM Server for SPARC (previously called Sun Logical Domains), allows a single UltraSPARC processor to be subdivided into many independent virtual processors. Each of these virtual processors is allocated one [...]

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CUDA Senseis at NVIDIA are hosting a series of webinars in the art of programming CUDA. Join us to learn how to use these sharp tools that can slice and dice — not watermelons — but convolution matrices.
3/22/11 7am PST CUDA 4.0 — Feature Overview — Europe
3/23/11 9am PST Parallel Nsight Pro for Compute Debugging [...]

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When: April 6, 2011 - 10am PST
Presenter: Jim Holt, Manager of Processor Core Architecture and Modeling Team, Freescale and MRAPI working group chair
Register Here
Multicore processors designed for embedded applications can consist of a varying number of shared system resources, such as cores, hardware accelerators and memory. Furthermore, you can expect that these resources will change [...]

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The Multicore Association has released version 2.0 of its multicore communications application programming interface (MCAPI) specification. The spec, available from its Web site, defines new features, such as domains for routing purposes.
“Our original MCAPI specification has seen enthusiastic uptake with more than 1,000 downloads,” said Markus Levy, president of the Multicore Association. “Extensive member feedback, [...]

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by Andreas Stiller
3D is popular in cinemas, TVs and increasingly in chips, too. Already, there are 3D image sensors and soon 3D stacks for memories and processors will follow. And AMD processors receive new names: Sempron, Athlon and Phenom to become extinct.
At CeBIT, IBM boss Palmisano tactfully covered up the slip-up of the German chancellor [...]

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By Timothy Prickett Morgan, Register
Chip maker Advanced Micro Devices lifted the veil a bit on the “Bulldozer” core module at the IEEE’s International Solid-State Circuits Conference in San Francisco, showing off the power savings and faster clock speeds that the new design will allow for its workstation and server processors.

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By Zewde Yeraswork, CRN
AMD’s upcoming multicore, high-end desktop processors, code-named Zambezi and based on its Bulldozer architecture, will be branded as AMD’s FX series CPUs.
According to a report from Nordic Hardware, eight-core and four-core versions of AMD’s Zambezi processors featuring AMD’s TurboCore 2.0 technology are due in June.

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A new range of 32-bit MCU family has been designed to make advanced driver assistance systems more affordable for a broad range of vehicles. It could help promote safety features, such as blind-spot detection, lane-departure warning systems, side view assistance and adaptive headlights. These and similar advanced automotive safety systems are part of the rapidly [...]

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