NVIDIA today announced the latest version of the NVIDIA® CUDA® Toolkit for developing parallel applications using NVIDIA GPUs.
The NVIDIA CUDA 4.0 Toolkit was designed to make parallel programming easier, and enable more developers to port their applications to GPUs. This has resulted in three main features:

[Read more →]

by Dylan McGrath
Intel Corp. disclosed more technical details of its 32-nm Sandy Bridge processor at the International Solid-State Circuits Conference here Tuesday (Feb. 22), including further description of its modular ring interconnect, design techniques used to minimize the cache’s operational voltage and the inclusion of debug bus for monitoring traffic on the interconnect.

[Read more →]

By Timothy Prickett Morgan, The Register
If the Chinese government is scaring the world with its hybrid CPU-GPU clusters, what do you think the reaction will be when Chinese supercomputers shun American-made x64 processors and GPU co-processors and start using their own energy-efficient, MIPS-derived, x86-emulating Godson line of 64-bit processors?
Apoplexy? Disbelief? A polite bow of respect? [...]

[Read more →]

by Rick Merritt
1. When will a full spec be openly available?
2. What is Thunderbolt?
3. What are the applications for Thunderbolt?
4. Will Thunderbolt kill USB?

[Read more →]

Second International Workshop on New Frontiers in High-performance and Hardware-aware Computing
(HipHaC’11) was held on February 13th, 2011 in San Antonio, Texas, USA. This workshop aimed at combining new aspects of parallel, heterogeneous, and reconfigurable microprocessor technologies with concepts of high-performance computing and, particularly, numerical solution methods. Compute- and memory-intensive applications can only benefit from the [...]

[Read more →]

by Ed Sperling
It’s probably too harsh to say that multicore has been a failure, but it’s flat-out wrong to say it has been successful.
Multicore was an inevitable outgrowth of Moore’s Law. You simply can’t keep turning up the frequency for processors at advanced nodes without cooking the chip into oblivion. In theory, four cores running [...]

[Read more →]

by Larry Hardesty, MIT News Office
Computer chips’ clocks have stopped getting faster. To maintain the regular doubling of computer power that we now take for granted, chip makers have been giving chips more “cores,” or processing units. But how to distribute computations across multiple cores is a hard problem, and this five-part series of articles [...]

[Read more →]

AMD last week announced the introduction of the OpenCL™ University Kit, a set of materials that can be leveraged by any university to assist them in teaching a semester course in OpenCL programming.
This effort underscores AMD’s commitment to the educational community, which currently includes a number of strategic research initiatives, to enable the next generation [...]

[Read more →]

Jeff Nichols, ORNL’s associate lab director for scientific computing, said the first cabinets of the new Cray supercomputer (with NVIDIA’s GPU technology) should arrive before the end of the year.

[Read more →]

by Tim Fischer
Ever since my colleague, Mike Butler, presented AMD’s first deep-dive look into the upcoming “Bulldozer” core at HotChips last year, interest has run high to hear more. Some of AMD’s best and brightest will be doing just that this week at the International Solid State Circuits Conference (ISSCC) in San Francisco.
To quickly [...]

[Read more →]

By Stacey Higginbotham
Human beings are complicated organisms that have evolved entire systems of feedback and governance to ensure our minds and our bodies are performing well. When we overheat, we sweat, and when we need food, we get hungry, then eat. As our computers become more complicated through the addition of multiple cores, MIT scientists [...]

[Read more →]

AMD today announced the introduction of the OpenCL™ University Kit, a set of materials that can be leveraged by any university to assist them in teaching a semester course in OpenCL programming.
This effort underscores AMD’s commitment to the educational community, which currently includes a number of strategic research initiatives, to enable the next generation of [...]

[Read more →]

Prof. Ridgway Scott of University of Chicago gave a series of presentations at Boston University’s Pan-American Advanced Studies Institute (PASI). The presentation slides are available online as well as the videos.
Presentation Slides
Lecture 1 Video:

[Read more →]

Felipe Cruz of Nagasaki Advanced Computing Center of Nagasaki University, Japan gave lectures on GPU computing and programming at Pan-American Advanced Studies Institute (PASI) of Boston University.
Here are the links to the 3 lectures:
Lecture 1 Slides
Lecture 2 slides
[Lecture 2 on Youtube]

Lecture 3 slides

[Read more →]

by Phil Ling
Multicore technology is creating waves at every level of the embedded industry; barely a day goes by without a new integrated solution being announced or a software tool targeting SMP/AMP software development. While the technical challenges of developing new software for a multicore platform may be significant, what about porting legacy, inherently sequential [...]

[Read more →]

by Ed Hansberry
Multi-core processors on desktops and laptops have been available for years. Even netbooks often have dual-core processors. In fact, you’d be hard pressed to find a single core computer today. Smartphones though are just now beginning to see the benefits of dual-core chips.
Full Story

[Read more →]

by Rick Merritt
Intel will make the first technical disclosures about Poulson, its next-generation Itanium processor, at the International Solid State Circuits Conference here Monday. Intel said the 3.1 billion transistor CPU is the largest general-purpose processor it has designed to date.
Poulson doubles to eight the number of cores and to 12 the number of instructions [...]

[Read more →]

by Mark LaPedus
At the 2011 International Solid-State Circuits Conference (ISSCC) here, Texas Instruments Inc. and the Massachusetts Institute of Technology (MIT) will outline what could be a major breakthrough in the gap between performance demands and battery capacity in the mobile space.
In a paper, TI and MIT will present research detailing design methodologies for [...]

[Read more →]

By Orion Granatir
Particle systems are an ideal candidate for multi-threading in games. Most games have particle systems and their general nature of independent entities lends well to parallelism. However, a naïve approach won’t load balance well on modern architectures. There are two complementary approaches, task-based threading and SSE, which are ideally suited for particle systems [...]

[Read more →]

This book presents new concepts, techniques and promising programming models for designing software for chips with “many” (hundreds to thousands) processor cores. Given the scale of parallelism inherent to these chips, software designers face new challenges in terms of operating systems, middleware and applications. This will serve as an invaluable, single-source reference to the state-of-the-art [...]

[Read more →]