IBM researchers revealed a previously unknown aspect of key physics inside Racetrack memory — a new technology design which stands to improve memory capabilities within mobile phones, laptop computers and business-class servers. This new class of memory could enable devices to store much more information - as much as a factor of 100 times greater [...]

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by Peter Clarke
The Embedded Microprocessor Benchmark Consortium (EEMBC) has announced that Plurality Ltd., a developer of many-core processors, has joined the consortium’s Consumer Workgroup.
Plurality (Netanya, Israel), founded in 2004, develops intellectual property, semiconductors and acceleration boards utilizing the company’s many-core processors with up to 256-cores. EEMBC develops benchmark software to ease comparison of different company’s [...]

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By Timothy Prickett Morgan
Three weeks ago, Oracle co-founder and chief executive officer, Larry Ellison, gave us all a preview of the upcoming Sparc T series processor roadmap as part of the rollout of the Sparc SuperCluster, an Exadata-style parallel database machine based on the current Sparc T3 processors. In the wake of Ellison’s revelations, Rick [...]

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GPULib provides a library of mathematical functions that facilitate the use of high performance computing resources available on modern graphics processing units (GPUs) by engineers, scientists, analysts, and other technical professionals. Many users of numerical analysis are programmers out of necessity, rather than choice. They would prefer to focus in the domains of expertise, but [...]

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by Amit Chatterjee
Software and digital experience is now becoming ubiquitous in our lives. Software is everywhere – it is stocking supermarket shelves, delivering electricity and water to our homes, storing our personal information in computers around the world, running nuclear plants and even controlling doomsday weapons! Moreover, with the popularity of the Internet and mobile [...]

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by Michael Ewan
This paper discusses recent (Originally Published On January 23, 2009) research and testing of clustered, parallel file systems and object storage technology. Also included is an overview of product announcements from HP, IBM and Panasas in these areas.

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By Cheri Helregel
Computer science researchers at the University of Illinois at Urbana-Champaign have released a new, interactive tool that simplifies writing safe parallel programs in Deterministic Parallel Java (DPJ) – a modern type and effect system based on the Java programming language.
Released as an eclipse plugin, DPJizer is the first interactive practical type and effect [...]

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By Emil Protalinski, TechSpot.com
Intel’s new Sandy Bridge processors have a new feature that the chip giant is calling Anti-Theft 3.0. The processor can be disabled even if the computer has no Internet connection or isn’t even turned on, over a 3G network. With Intel anti-theft technology built into Sandy Bridge, David Allen, director of [...]

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The complexity of computing systems has tremendously increased over the last decades. Hierarchical cache subsystems, non-uniform memory, simultaneous multithreading and out-of-order execution have a huge impact on the performance and compute capacity of modern processors.
Software that understands and dynamically adjusts to resource utilization of modern processors has performance and power advantages. The Intel® Performance [...]

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by Christopher Mims
There are dozens of ways to usefully measure the performance of the world’s fastest supercomputers — everything from the speed of a system’s internal communications network and its ability to randomly access memory, to the traditional measure of a high performance system’s speed: its ranking on the Linpack benchmark, which is used to [...]

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by Chris Ziegler
That’s right, it’s official. Needless to say, that LG Star we recently got our paws on is very real, though it won’t go by that name at retail — just as LG’s own release materials had suggested, this monster has picked up the Optimus 2X name as it morphs from a prototype into [...]

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by William Wong
Google’s Android and Apple’s iOS remain in the spotlight because of tablets and smart phones. But there were plenty of other software highlights this year for embedded developers.
IAR Systems incorporates power into its IAR Embedded Workbench debugger. Eurotech’s offerings address the cloud from a device perspective. And, Intel’s Parallel Studio XE and Cluster [...]

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By Mary Jo Foley, ZDNet
There were a lot of promised deliverables on the Azure cloud roadmap that Microsoft unveiled at its Professional Developers Conference (PDC) in October 2010. This week, the Redmondians rolled out more of them, including a public beta of the Windows Azure Virtual Machine Role.
According to a December 14 TechNet blog [...]

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By Andrey Marochko
Previous blog by the author: TBB scheduler clandestine evolution
In this blog, the author talks about a couple of small but quite useful improvements in the TBB scheduler behavior made in TBB 3.0 update 4.
Once you have a more-than-64-CPU/core machine running Windows 7 x64, you’ll have to do some additional manipulations to allow your [...]

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By Douglas Eadline
When High Performance Computing (HPC) is mentioned, one often envisions a large expensive mainframe built by a company like Cray, IBM, SGI, or Sun (now Oracle). These machines are highly parallel and employ a Symmetric Multi-Processing (SMP) design that provides global memory and process spaces. Delivering this level of performance has always [...]

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Vivante Corporation, a leading provider of consumer multimedia and computing IP, today announces an important milestone for its Scalarmorphic architecture with Vivante licensees’ multicore silicon implementations reaching over 1 GHz in silicon. Vivante has been licensing multicore versions of its industry-leading GC series architecture during the past fourteen months with the initial customer SoC implementations [...]

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by Gaston Hillar
Python 3.2 Beta 1 adds a futures library for concurrent programming that is part of a new concurrent top-level package. The main goal is to simplify the parallelization of code and to make it simple to launch and control asynchronous and concurrent operations. In addition, this new release provides many improvements to existing [...]

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MathWorks announced a new capability that accelerates code generation build times for engineers working on designs that are componentized with model reference. This speed enhancement is available through Real-Time Workshop, a code generation tool that now leverages the performance scaling capabilities of Parallel Computing Toolbox and MATLAB Distributed Computing Server (MDCS). The capability also extends [...]

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By Gastón C. Hillar
Modern microprocessors can execute Single Instruction, Multiple Data (SIMD) instructions. Because the execution units for SIMD instructions usually belong to a physical core, it is possible to run as many SIMD instructions in parallel as available physical cores. The usage of these vector-processing capabilities in parallel can provide important speedups in certain [...]

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David Kanter from Real World Tech e-mailed us about his new article on AMD Caymen Architecture.
The major trend in graphics is programmability and targeting highly parallel, general-purpose workloads. Historically, AMD has focused on gaming performance. However, DirectCompute and OpenCL are beginning to take hold and create the seeds of a software ecosystem. AMD’s new [...]

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