by Baruch Evenor
One day several years ago, the quick response product development team at our company was asked to do the impossible: develop a new project and deliver a working prototype of a broad-band (5 MHz to 20 GHz) long-range fiber-optical analog link system to a government contractor in 30 days.
This system needed to [...]

[Read more →]

By David Ott
Part 1: Power Management Basics
Because of the need to integrate hardware features with software management, today’s computer system power management framework is defined by an open industry specification known as ACPI. ACPI, or the Advanced Configuration and Power Interface specification[1], is an operating system-based scheme for managing system power features and is intended [...]

[Read more →]

by Eric D. Isaacs, Director, Argonne National Laboratory
Four decades ago, NASA put a man on the moon using a computer system less powerful than the electronics in many modern-day toasters. With that audacious act of technological faith, the United States took a giant step toward global leadership in science, engineering, and a myriad of other [...]

[Read more →]

As part of its guest membership programme, the Multicore Association (MCA) invites guest members with multi-core implementation expertise for contributions that will fasten time to market for multi-core products.
The programme allows individual working groups to recruit outside experts who can bring in unique knowledge or skills that would otherwise be beyond the organisation’s reach.
While individuals [...]

[Read more →]

Nvidia Corp. shed some light onto its exascale development project known as Echelon at the SC10 supercomputer-related trade-show last week. The company’s researchers are completely convinced that machines capable of performing at least a quintillion double-precision floating point operations per second should be heterogeneous, e.g. employ both highly-parallel as well as high-performance serial processors.
Even [...]

[Read more →]

by Ganesh Balakrishnan et al.
In this paper, the authors examine the architecture and performance of the Intel® Xeon® processor 5600 Series. Similar to the 5500 Series processors, the 5600 architecture will also present challenges to customers due to the flexibility and configuration choices offered by the new platform. The performance analysis will cover latency to [...]

[Read more →]

by Theodore Omtzigt, Stillwater Supercomputing
With the explosion of data and the need to make sense out of it all on a smart phone is creating an interesting opportunity. Mobile devices need high performance at low power, and Apple seems to be the only one that has figured out that having your own processor team and [...]

[Read more →]

By Dan Olds
At this point, every server vendor+dog has some sort of integrated CPU-GPU system that they’re offering to their high performance computing (HPC) and other number-crunching customers.
The recently introduced Tetra from Appro has upped the ante by offering more GPUs than any other manufacturer in a small 1U package. This solution is super-dense with [...]

[Read more →]

by Dave Strenski, Cray; Prasanna Sundararajan, Xilinx; and Ralph Wittig, Xilinx
For the past several years, Field Programmable Gate Arrays (FPGAs) have been getting large enough to compete with microprocessors in floating-point performance. Using the theoretical peak performance numbers, the FPGA’s floating-point performance is growing faster than microprocessors. This article calculates the peak performance for [...]

[Read more →]

The Multicore Association (MCA) is implementing a guest membership program to encourage contributions of expertise that will reduce time to market for products with multicore implementations.
The program allows individual working groups to recruit outside experts who can bring in unique knowledge or skills that would otherwise be beyond the organization’s reach.
While individuals can apply for [...]

[Read more →]

By Timothy Prickett Morgan
More than the hand-wringing over parallel computing, the mounting electricity bill is the limiting factor holding back the growth of petascale systems. The recurring joke at the SC10 supercomputing conference last week was that we cannot build exascale systems that require their own nuclear power plant to juice them up. And that [...]

[Read more →]

by Sehat Sutardja
Hidden behind the recent good news in the semiconductor industry is a developing crisis that I fear will spread across the entire electronics industry within a decade.
Moore’s Law is not really a law at all; as Dr. Moore himself regularly reminds us, it is merely a social contract between the semiconductor industry and [...]

[Read more →]

By Rob Farber
CUDA, Supercomputing for the Masses Part 20 focuses on the analysis capability of Parallel Nsight v1.0 coupled with the NVIDIA Tools extension (NVTX) library to illustrate asynchronous I/O, hybrid CPU/GPU computing, and the performance of primitive restart to dramatically accelerate OpenGL rendering in CUDA applications. (Note that Parallel Nsight 1.5 has been released, [...]

[Read more →]

By Timothy Prickett Morgan
Although everybody seems to be excited about GPU-goosed supercomputing these days, Big Blue is sticking to its Power-based, many-cored BlueGene and Blue Waters massively parallel supers, and revving them up to bust into the 20-teraflops zone.
The Blue Waters massively parallel Power7-based supercomputer and its funky switching and interconnect, and very dense packaging [...]

[Read more →]

By Edward Berridge
ARM is about to reveal processor cores that support 64-bit computing within the next few weeks.
Sources close to the company speaking at an ARM technology conference in Taipei said that they have been lugging “samples” around to the various chip makers to rustle up some business.
While there has been talk about a move [...]

[Read more →]

by Steve Conway [Published in Aug 2010]
Big challenges lie on the software side in efficiently corralling hardware’s runaway parallelism
At an IDC HPC User Forum meeting in 2005, Paul Muzio, director of the HPC Center at City University of New York, said that an application engineer’s ideal petascale supercomputer would have one powerful processor [...]

[Read more →]

AccelerEyes introduced its new product, LIBJACKET, a broad and fast C/C++ library for GPU computing on Nov 17th. With over 500 C/C++ functions, LIBJACKET represents the largest GPU computing library in the world. This CUDA-based library integrates seamlessly in any application enabling optimized utilization of NVIDIA CUDA-capable GPUs, including powerful Tesla compute devices.
LIBJACKET features include [...]

[Read more →]

By Joab Jackson, IDG News
An experimental Intel chip shows the feasibility of building processors with 1,000 cores, an Intel researcher has asserted. The architecture for the Intel 48-core Single Chip Cloud Computer (SCC) processor is “arbitrarily scalable,” said Intel researcher Timothy Mattson, during a talk at the Supercomputer 2010 conference being held this week in [...]

[Read more →]

Renowned supercomputing expert Pete Beckman has been named director of a newly created Exascale Technology and Computing Institute (ETCi) at the U.S. Department of Energy’s (DOE) Argonne National Laboratory. Working with scientists and industrial partners from around the world, the ETCi will focus on developing exascale computing to extend scientific discovery and solve critical science [...]

[Read more →]

The Open Petascale Libraries (OPL) project has appointed the Numerical Algorithms Group as the OPL Project Librarian.
NAG will be the custodian of the library source code and will be producing periodic binary releases, as well as providing some of the algorithmic content. NAG will also work with the other project members to formulate and maintain [...]

[Read more →]