Here is a paper from MIT that discusses scalability of Linux OS to multicore CPUs.
Abstract
This paper analyzes the scalability of seven system applications (Exim, memcached, Apache, PostgreSQL, gmake, Psearchy, and MapReduce) running on Linux on a 48-core computer. Except for gmake, all applications trigger scalability bottlenecks inside a recent Linux kernel. Using mostly standard parallel [...]

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by Larry Hardesty, MIT News Office
Computer chips have stopped getting faster. To keep improving chips’ performance, manufacturers have turned to adding more “cores,” or processing units, to each chip. In principle, a chip with two cores can run twice as fast as a chip with only one core, a chip with four cores four times [...]

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by Andrew Binstock
When writing software for games and data visualization, it is tempting to optimize code on-the-fly. That is, as you code, you make small design and implementation tweaks to the code — change a data type here, fix a data structure there, execute function B before function A, and so on. The temptation to [...]

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By Agam Shah
Writing applications for devices like tablets and smartphones could become more challenging as CPUs and hardware accelerators are added to mobile chips, experts agreed at a processor conference on Monday.
Chip makers are adding CPUs and specialized hardware accelerators to mobile chips as an energy-efficient way to boost application performance on tablets and smartphones. [...]

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by Dylan McGrath
Fabless chip vendor Tilera Corp. Monday (Sept. 27) detailed its third generation of multicore processors, headlined by an SoC that features 100 64-bit cores.
Presenting at the Linely Tech Processor Conference here, Bob Doud, director of marketing at Tilera, said the company’s Tile-Gx product line would offer performance increases of two to [...]

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by Mark LaPedus
After a false start, Applied Micro Circuits Corp., or AppliedMicro, is taking another shot in the multicore processor arena.
The new device, dubbed PacketPro, is AppliedMicro’s second-generation embedded processor system-on-a-chip (SoC) family. It is based on the PowerPC technology ranges in performance from 600-MHz to 2.0-GHz and beyond.
The company has announced multicore [...]

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by R. Colin Johnson
Vector processing accelerates tasks even more than multiple-cores, that is if the same instructions are being executed on multiple parallel data streams—called single-instruction-multiple-data (SIMD). SIMD is traditionally used for parallel data tasks such as dimming all the pixels in an image, but new demands from multiple 4G users are now enabling wireless [...]

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Dan Olds from the Register interviews Andy Keane, GM of the Tesla Business for Nvidia.

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By Andrew Jones
The world’s most powerful supercomputers can require many megawatts of electricity to operate. But what if the next factor of 1,000-fold performance increase needs 100MW, asks Andrew Jones.
There are a range of estimates for the likely power consumption of the first exaflops supercomputers, which are expected at some point between 2018 and 2020. [...]

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by Patrick Thibodeau
To make a point about China’s interest in supercomputing, David Turek, IBM’s vice president of deep computing, displayed a slide with a picture depicting a large construction site for a building that will house a massive computer.
It’s not just China that’s rushing to build supercomputing centers, but Europe and Japan as well, said [...]

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By Lucas Mearian
As high-performance computing (HPC) becomes more important in helping financial services companies deal with a rising tsunami of data, there’s growing angst on Wall Street about a dearth of skilled programmers who can write for multicore chip architectures and parallel computing systems.
“In high-performance computing, there is a major sea change that’s been happening… [...]

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The NVIDIA Research Summit is a cross-disciplinary forum targeting researchers interested in using GPUs in science and engineering. Here are some interesting posters of the Research summit.
Accelerating Symbolic Computations on NVIDIA Fermi
Particle-In-Cell Simulations on the GPU
Parallel Ant Colony Optimization with CUDA
Task Management for Irregular Workloads on the GPU
A Hybrid Method [...]

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by Sean Koehl
In the past year, Intel has launched three new research centers focused on different aspects of the same challenge: developing supercomputers with Exa-scale performance levels. That means a billion billion computations per second. To put that in context, if you had all ~6.9 billion people on earth scribbling out math problems at [...]

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GTC Day 3 kicked off with a fireside chat between Jen-Hsun Huang and Forbes national editor Quentin Hardy, covering everything from fundamental changes in the computer industry, to skills needed by the next generation of entrepreneurs, to products that will be hot for the holidays. Sebastian Thrun, robotics pioneer at Stanford and distinguished engineer [...]

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Integrated silicon solution specialist, Marvell has announced what it says is the world’s first 1.5GHz tri-core application processor.
The Armada 628, incorporates an SoC design with three ARM compliant cpu cores, operating as what Marvell describes as the world’s first commercially available heterogeneous, multicore, applications processor.
Weili Dai, vice president and general manager of Marvell Semiconductor’s Consumer [...]

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Nvidia’s CUDA has been hailed as “Supercomputing for the Masses,” and with good reason – amazing speedups ranging from 10x through hundreds have been reported on scientific / technical code. CUDA has become a darling of academic computing and a major player in DARPA’s Exascale program, but performance alone does not account for that popularity: [...]

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The GPU Technology Conference started on Monday. On Tuesday Nvidia CEO Jen-Hsun Huang gave a keynote speech that includes announcements of PGI CUDA-x86 compiler, MATLAB, Ansys, and Amber HPC applications, which are running on the Tesla GPU platform.
Video

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By Rik Myslewski
Nvidia president and CEO Jen-Hsun Huang has outed the company’s GPU roadmap.
“For the very first time in the history of our company,” Huang during his Tuesday keynote at the company’s GPU Technical Conference in San Jose, California, “we are going to tell you the code names and the progression of our next several [...]

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The Portland Group®, a wholly-owned subsidiary of STMicroelectronics (NYSE: STM) and a leading supplier of compilers for high-performance computing (HPC), today announced it is developing a CUDA C compiler targeting systems based on the industry-standard general-purpose 64- and 32-bit x86 architectures. The new PGI CUDA C compiler for x86 platforms will be demonstrated at the [...]

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by Suzanne Tracy
A distinguished group of researchers and IT professionals assembled on Wednesday, June 23, 2010, in Huntsville, AL, to share their expertise and perspectives in a one-day workshop, part of a series of such gatherings being organized by Dell’s HPC solutions team under the theme “Enabling Discovery.” Tim Carroll, Senior Manager with Dell’s [...]

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