Lauterbach and Cortus are pleased to announce that the Lauterbach TRACE32® Power Tools now fully support the Cortus APS3 family of processors.
The power of Lauterbach’s TRACE32 Power Tools is now available for the Cortus APS3 family of ultra low power embedded CPUs. Non-intrusive debugging over JTAG is supported giving engineers full visibility of program execution [...]

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For a while now, NVIDIA has been offering a graphics technology that allowed the user to change between a discrete GPU and an integrated GPU in their notebook computer. The user had to initiate the change when they wanted to use either GPU and many users simply never used the feature. The goal was to [...]

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Rambus announced its Mobile XDR memory architecture for next-generation mobile products, combining high-bandwidth and low-power.
The Mobile XDR memory architecture will enable future mobile memory platforms which can achieve throughputs of up to 4.3Gbps per pin while being power efficient.
With this breakthrough performance, SoC platforms can achieve over 17GB/s of memory bandwidth from a single Mobile [...]

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by Adrian Kingsley-Hughes
It seems like a week doesn’t go by without ATI releasing a new GPU. Today we get a GPU that slots in between the HD 5450 and HD 5670 - introducing the Radeon HD 5570.
The Radeon HD 5570 completes the 500-series line-up. Priced at around $80 it fits in nicely between the HD [...]

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by Joe McKendrick
Ask a group of eight IT industry analysts what 2010 will bring, and you will get 100 different answers.
In the latest BriefingsDirect podcast, ZDNet compatriot Dana Gardner attempted just that, and one topic seem to rise to top the list above all others: cloud computing. Is it because cloud computing is lighter [...]

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A researcher from Keio University in Japan showed a way to put an entire solid-state disk in the footprint of a single chip in an evening talk at the International Solid State Circuits Conference (ISSCC) here.
Keio researchers used inductive coupling to link a stack of 128 NAND flash die and a controller. The wireless interface [...]

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LSI Corporation today introduced a new portfolio of asymmetric multicore silicon solutions and software for wireless applications. Built upon previous generations of industry-leading LSI wireless infrastructure solutions and designed to provide increased levels of intelligence, control and security for wireless networks, these next-generation processors are the realization of the asymmetric multicore blueprint first announced by [...]

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Wind River released an updated version of Wind River Hypervisor, its embedded virtualisation solution for single and multicore processors, the provider of embedded and mobile software said on Tuesday.
According to the company, the new Wind River Hypervisor 1.1 release supports the latest Intel processors and enables new inter-virtual machine communication capabilities. In addition, debugging [...]

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NVIDIA Corp. announced today that it has recognized the University of Maryland as a CUDA Center of Excellence, placing it in an elite grouping of 9 other universities and research organizations worldwide. The university was selected for its pioneering use of GPU computing and the CUDA programming model across research and teaching efforts within multiple [...]

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A project that aims to revolutionise the design of technologies for supporting research has been awarded a grant of 1.7 million (about $2.6 million) by the UK’s Engineering and Physical Sciences Research Council and the Arts and Humanities Research Council through the RCUK Digital Economy programme.
The multidisciplinary project, entitled PATINA (Personal Architectonics of Interfaces to [...]

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Power efficiency is the single biggest challenge facing the mobile handset industry, and collaboration is needed to enable the industry to deliver a required 100X improvement in power efficiency for mobile devices, according to a keynote presentation at the International Solid State Circuits Conference (ISSCC) here Monday (Feb. 8).
Greg Delagi, senior vice president of wireless [...]

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By Agam Shah
Advanced Micro Devices will put more focus on tightly integrating graphics processor cores into mainstream servers starting 2012 as it tries to increase system performance, a company executive said.
Mainstream servers in the future could have a combination of graphics processors and CPUs in servers as applications take advantage of thousands of GPU cores, [...]

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Embedded designers will only be able to exploit the potential of multicore processor architectures if the applications software takes advantage of parallelism. This was the starting point for the Massively Parallel Computing seminar held during IP/ESC09 in December 2009.
Massively parallel computing architectures and parallel programming are not new, even in the embedded world – [...]

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By Sharon Gaudin
After about a year of delays, Intel Corp. today took the wrappers off its high-end Itanium processor, which is code-named Tukwila.
The new Itanium 9300 processor originally was slated to be released early in 2009, but that timetable slipped twice last year. The timing turned out to benefit Intel a bit, because Tukwila ended [...]

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By Mark Fontecchio
IBM rolled out four servers based on its new multicore Power7 processor at an event in New York on Monday, claiming superiority in the shrinking — but still substantial — Unix market.
The news comes a week after Oracle Corp. outlined plans to push the Sun Microsystems Sparc-Solaris combo as the foundation for high-end, [...]

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By Richard Adhikari
IBM’s new Power7 processors provide the foundation for several new Unix server offerings from the company. Each Power7 processor has up to eight cores and four threads per core. Power7 also features “TurboCore” mode and has “intelligent threads,” meaning the number of threads varies depending on the workload.
IBM on Monday launched a one-two [...]

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Intel Corp. has a significant, if temporary, edge over archrival Advanced Micro Devices based on news and papers emerging here Monday (Feb. at the International Solid State Circuits Conference (ISSCC).
Intel described at ISSCC its first 32nm server processor to use six cores. Meanwhile AMD discussed a new core it will use in its first [...]

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Consumers will be able to fix their automobiles while the car gives step-by-step advice, attack their ailments by making computer models of various treatments to find the best one and duck into virtual fitting rooms to try on a store’s clothes without leaving home.
All that and much more will be possible - in some cases [...]

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by Grant Martin
The Design Automation and Test in Europe 2010 conference will be held in Dresden Germany from March 8 to 12. DATE has many interesting things to offer attendees. Here are some technical sessions that look interesting:
6.8 PANEL SESSION – The Challenges of Heterogeneous Multi-Core Debug
7.8 PANEL SESSION - Who is closing the [...]

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By Cristian F. Dumitrescu
Minimizing/hiding the latency of complex or I/O intensive operations
Apart from common operations performed by any network processing intensive application (see Part 1), packet processing involves some specific operations that cannot be efficiently implemented with a general purpose instruction set.
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When using the pipeline model, each stage of the pipeline must still meet the [...]

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