In another move toward consolidation in business computing, Hewlett-Packard and Microsoft said they will spend as much as $250 million over the next three years in a new collaboration to deliver integrated systems, software and services for cloud computing.
The two expect to roll out a variety of products based on Microsoft’s Azure cloud service, running [...]

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In industry surveys, more than 80% of embedded systems software developers report using either C or C++ as their primary programming language. Yet as a group, they earned a failing grade on a multiple-choice evaluation of their firmware-related C knowledge.
In December of 2007, an Embedded C Quiz was launched online as part of a redesigned [...]

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CodePeer is a source code analysis tool that detects run-time and logic errors in Ada programs. Serving as an efficient and accurate code reviewer, CodePeer identifies constructs that are likely to lead to run-time errors such as buffer overflows, and it flags legal but suspect code typical of logic errors.
Going well beyond the capabilities of [...]

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Enea today announced the immediate availability of the Enea® Optima 2.2 Eclipse-based integrated development environment. Enea Optima 2.2 features new capabilities for rapidly developing complex embedded multicore applications including enhanced profiling, analysis and memory management.
“With the increasing complexity of modern multicore processors, the problem of distributing a software application across different cores to maximize the [...]

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The PADTAD 2010 workshop is a two-day event at ISSTA 2010, focusing on techniques and systems that aid in the testing, analysis, and debugging of multi-threaded, parallel and distributed applications and systems. The workshop has a practical and applied emphasis on systems that have been implemented in (at least) prototype form, but also welcomes submissions [...]

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by Michael Scharfe, Rainer Pielot and Falk Schreiber
“Solving bioinformatics tasks often requires extensive computational power. Recent trends in processor architecture combine multiple cores into a single chip to improve overall performance. The Cell Broadband Engine (CBE), a heterogeneous multi-core processor, provides power-efficient and cost-effective high-performance computing. One application area is image analysis and visualisation, in [...]

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The simplest level of parallelization is done by users themselves, and has been around for years. There is no coupling between tasks. You just launch different scenarios on different servers. All the scenarios run in parallel, each at single-processor speed. But if you don’t have a bunch of scenarios—different process corners or operating modes, say—to [...]

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EDA and IP vendor Synopsys Inc. said it has added threaded multicore processing to its latest release of PrimeTime static analysis tool, enabling up to 2x speed of timing signoff.
The trend in CPU performance improvement lies in parallel computing. In order for EDA applications to adjust to design size and complexity, they need to use [...]

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TenAsys Corporation, a provider of real-time OS and virtualization software, has announced that all of its embedded virtualization software products, including the INtime real-time OS for Windows, provide full support for new 2010 Intel Core processors and companion chipsets for the embedded market.
The TenAsys INtime RTOS works alongside Windows to provide fully deterministic processing of [...]

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by David Mackay
Libraries play an important role in threading software to run faster on Intel multi-core platforms.
Multi-core platforms are the default computer platforms sold throughout the world. On a multi-core platform there are multiple processors contained on a single chip. That is, each chip has multiple cores that are each [...]

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A new project on Google Code called ‘Ocelot’ aims to compile CUDA programs for execution on NVidia GPUs and x86 CPU’s.
Ocelot is a dynamic compilation framework for heterogeneous systems, accomplishing this by providing various backend targets for CUDA programs. Ocelot currently allows CUDA programs to be executed on NVIDIA GPUs and x86-CPUs at full [...]

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It took Intel CEO Paul Otellini only about a minute to mention Moore’s Law in his CES keynote on Thursday, remarking that the ‘law’ was “not a law of nature, but a law that reflects human inventiveness.”
“Every two years we schedule a breakthrough,” said the Intel premiere, noting that each one of these breakthroughs cost [...]

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QCon London 2010 will be held between March 10 and 12th. On March 12th, technology leaders such as Joe Armstrong (Erlang), Simon Marlow (Haskell), Ralph Johnson, Co-author of Design Patterns, discuss various topics of concurrent programming. Here is an abstract of the event hosted by Ulf Wiger.
“By now “The free lunch” ended more than five [...]

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By Paul Fischer
OpenMP Threading and Intel IPP
The low-level primitives within the IPP library generally represent basic atomic operations. This limits threading within the library to ~15-20% of the primitives. Intel OpenMP is used to implement internal threading and is enabled, by default, when you use one of the multi-threaded variants of the library. Multi-threaded versions [...]

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By Paul Fischer
Threading Choices for Your Intel IPP Application
Source code for some multi-threaded IPP application examples are included in the free sample downloads. Several of these examples implement threading at the application level, and some use the OpenMP* threading that is built into the Intel IPP library. In most cases the performance gains due to [...]

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By Paul Fischer
Introduction to Threading in IPP
There is no universal threading solution that works for every application. Fortunately the Intel® Integrated Performance Primitives (the Intel IPP library) are designed to be thread-safe. Applications that use the IPP library can implement threading at the low-level primitive level (i.e., within the IPP library using OpenMP), at the [...]

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By Brandon Hewitt
1. Instrumenting the application to output profiling data is just going to naturally add time. You have all this I/O as the application writes this runtime data to a file as it runs.
2. The compiler disables many optimizations when creating this instrumented application. Inlining for example, needs to be completely disabled if you’re [...]

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The ARMflix channel on Youtube has provided a side-by-side performance comparison of a netbook based on the Intel Atom processor and a dual-core ARM Cortex-A9 development board.
ARM set up both systems to run the same operating system, the same browser and put them on the same high-speed corporate network and checked for responsiveness to the [...]

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by Victor J. Duvanenko
Algorithm Improvement through Performance Measurement: Part 1
Algorithm Improvement through Performance Measurement: Part 2
Algorithm Improvement through Performance Measurement: Part 3
The In-place Hybrid MSD N-bit-Radix Sort I presented in In-place Hybrid N-bit-Radix Sort was developed as a combination of Radix Sort, Insertion Sort, and Counting Sort. This algorithm sorts arrays of integers [...]

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by Anand Lal Shimpi
Today NVIDIA is announcing its second generation Tegra SoC. It’s creatively named the Tegra 2 and this is what it looks like in block diagram form:

The SoC is made up of 8 independent processors, up from 7 in the original Tegra. The first two are the most exciting to me - a [...]

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