by Robert Cravotta, Technical Editor - EDN
Texas Instruments’ new six-core TMS320C6472 DSP boasts a 3.68W power-use sweet spot when operating all six cores at 500 MHz with 80% usage.
The cores support 625- and 700-MHz operation with a trade-off of energy efficiency at the 500-MHz operation point. The device includes 4.8 Mbytes of L1 and L2 memory partitioned so that each core has a dedicated portion of the memory as well as access to 768 kbytes of shared L2 program/data memory.
The shared memory controller provides no hardware-based coherency support, so applications requiring coherency require software management. Connectivity peripherals include GbE (gigabit Ethernet), Serial RapidIO, DDR2, a telecom-serial-interface port, a host-port interface, Utopia, I2C (inter-integrated circuit), and GPIO (general-purpose input/output).
