by Cameron Hughes, Tracey Hughes
There are several concurrency schemes that describe how parallelism can be performed. Concurrency schemes such as peer-to-peer, boss-worker, workpile, and pipeline describes how tasks distribute work in parallel. SIMD (Single Instruction Multiple Data) and MIMD (Multiple Instructions Multiple Data) are concurrency schemes that achieve data level parallelism. The PRAM (Parallel Random-Access Machine) model has four basic algorithmic approaches to access the shared global memory:
1. Concurrent read algorithms are allowed to read the same piece of memory simultaneously with no data corruption.
2. Concurrent write algorithms allow multiple processors to write to the shared memory.
3. Exclusive read algorithms are used to ensure that no two processors ever read the same memory location at the same time.
4. Exclusive write ensures that no two processors write to the same memory at the same time.
They can be combined into the following four strategies for possible read-write access:
* EREW (exclusive read and exclusive write)
* CREW (concurrent read and exclusive write)
* ERCW (exclusive read and concurrent write)
* CRCW (concurrent read and concurrent write)
Considering massive multicores, is this model too tired or too old or could it be America’s next top model?
