By Gene Frantz
- Processing elements will be single clock domains. After many years of assuming that Moore’s law would give us faster and faster clock speeds, we have finally concluded that clock speed is no longer our friend. In fact, we should have noted that 15 years ago, but as we move forward, processing elements will be of the size that the CPU can communicate with all of its resources in one clock cycle.
- Systems will be made up of multiple processing elements. Integrated systems will be made up of many heterogeneous processing elements, each being a “single clock domain” processor.
- The processing elements will be arranged in a similar style as FPGAs today.
- We will take advantage of the third dimension. Integration using stacked die techniques (SIP) will be just as common as fully integrated SoC.
- All will be programmed with a high-level language. The development environment will have the ability to take into account all of the resources in the system. That is the microprocessors, DSPs, accelerators, peripherals, analog signal processors, analog peripherals, RF and other things I have forgotten about.
- IC designs will consist of smaller teams (5 to 10 designers) taking a shorter amount of time (6 to 12 months) to do the hardware design. Reuse will be the norm.
