by Johan De Gelas, AnandTech
Take two Nehalem dies, turn them 90 degrees, add a lot of system interface logic and 8 MB extra of L3-cache and you get - very oversimplified - the impressive Nehalem EX, alias “Beckton”. The new Xeon MP is an impressive monster, just like it’s predecessor Dunnington. Dunnington consisted of 1.9 Billion transistors, the Xeon MP based on the “Nehalem” architecture will feature up to 2.3 Billion transistors.
Those 2.3 Bilion transistors are needed for
* Up to eight cores, 16 threads thanks to SMT
* Up to 24MB of shared L3 cache
* four QuickPath links
* four memory channels which support for up to 16 memory modules per socket
Intel calls the chips to drive the DDR-3 modules “Scalable Memory Buffer” chips, which means that Intel figured out that it is best to move the power gobbling AMB chip from the FBDIMMs to the systemboard. As you need only one chip to drive several registered DDR-3 modules, it consumes a lot less power than placing an AMB chip on each DIMM.
