Rambus has announced a set of new and existing interconnect technologies it says will meet the needs of main memory in 2011 and beyond. It hopes the industry adopts the techniques as part of a pending DDR4 DRAM standard.
The concepts are promising, but a history of intellectual property disputes clouds the road to adopting them. Rambus is in litigation with three of the four top DRAM makers, one of the cases stretching into its ninth year.
As part of its announcement, Rambus outlined a handful of market requirements it believes will be key for main systems memory interconnects in 2011 and beyond. They include doubling today’s DDR3 per-pin data rates to 3,200 Mbits/second, slashing active and idle power rates significantly and maintaining support for multiple dual in-line memory modules (DIMMs) per memory channel
