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An Introduction to Intel QuickPath Interconnect

April 6th, 2009 · 1 Comment




by Robert A. Maddox, Gurbir Singh, and Robert J. Safranek, source: Dr. Dobb’s Journal
The Intel QuickPath Interconnect starts by taking a fresh look at the architecture of the entire system and provides a complete solution to address these limitations. It is a very high performance fabric that is at the heart of very scalable and high performance systems with low system and silicon cost. The Intel QuickPath Interconnect architecture has been designed for the future generations of Intel processors and provides plenty of headroom for growth in performance and features. The Intel QuickPath Interconnect achieves these goals through the use of a narrow, high speed point-to-point links that require less than half the number of signals of the Front Side Bus for lower cost and yet provide fifty percent more bandwidth for higher performance. The Intel QuickPath Interconnect is also far more flexible and allows one to build very scalable systems around multiple processors, memory controllers, and I/O controllers. Systems based on Intel QPI can choose to integrate the memory controller and I/O controllers on to the same die with the processor and create a very scalable system that can be upgraded in a modular fashion. Every processor added to a system will bring additional memory bandwidth and capacity with its integrated memory controller and providing a very cost effective upgrade that offers a well balanced system. The Intel QuickPath Interconnect also provides efficient means to resolve cache coherence between multiple processors.

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