by Geoffrey James
For the past decade, Electronic System Level (ESL) has been widely seen as the future of EDA. And no wonder! Think of the productivity gains if chip designers could define what they want a chip to do… not how the circuitry is supposed to do it. Alas, the promise of ESL was continually scuttled by the demands of ever-more-complex manufacturing process. Try as it might, ESL was never able to automate the Register Transfer Level (RTL) “tweaking” required to turn a design into working silicon.
All of that looks poises to change, though. Innovations at the foundries, downstream from RTL, are combining with a new set of ESL tools to turn RTL tweaking (and the tools designers use to tweak) into an industry backwater. As a result, we may be on the cusp of a major restructuring of the entire EDA industry. “We are finally reaching a point similar to when RTL took over from gate-level design,” says EDA analyst Gary Smith. It’s a forecast he’s made before… and now it’s finally happening.
