Russell Hitchcock writes a brief introduction to cache coherency in multicore processors. Since each core has one or two levels of cache memories shared, maintaining shared data coherent is important. In this article, Russel writes about cache coherency protocols, such as MSI, MESI, MOSI, and directory-based cache coherency.
“What is cache coherency? In the context of multi-core processors, cache coherency refers to the integrity of data stored in each core’s cache. But why is cache coherency necessary? To answer this question I will refer to the multi-core processor shown in figure 1. Imagine that there are two threads running through the processor; one in core 1 and one in core 2. Now imagine that each core accesses, from the main memory, variable ‘x’ and places that variable in its cache. Now, if core 1 modifies the value of variable ‘x’, then, the value that core 2 has in its cache for variable ‘x’ is out of sync with the value core 1 has in its cache. This is an important issue with multi-core processors. Actually, this problem is not very different from multi processor (multiple chips) cache coherency problems.”
