By EDN Executive Editor Ron Wilson
There have been so many point issues with advanced digital process nodes that the resulting scramble to come up with solutions has been less than obviously organized. Some teams have worked on improving tool speed and capacity, while others have worked on adapting algorithms to multicore processing. Yet other teams have tried to adapt analysis tools to the multi-corner, multi-mode style of analysis necessary in advanced designs, while others still have pursued statistical techniques for timing analysis in the hope of avoiding the proliferation of corners. Another branch of the industry has been working on closer integration of digital and analog flows, in anticipation of the high-performance mixed-signal blocks that will certainly end up in some of the advanced ICs. And yet others have struggled to raise a recalcitrant umbrella of system-level estimation and design tools over the whole jumbled process.

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