At the Multicore Expo Japan 2008 here, Plurality Ltd. released the beta version of an extensive set of development tools for its HyperCore Architecture Line (HAL) of manycore processors. According to Plurality CEO, Igor Pe’er, the tools will facilitate the evaluation and widespread adoption of Plurality’s technology. Manycore architecture ” from tens to thousands of cores per processor ” is widely acknowledged as the natural evolution of multicore processing. HAL processors, he claims, will offer the highest performance at the lowest price per watt per square millimeter of any chip-level shared memory machine currently on the market.
“With multicore already mainstream, the future of computing inevitably will require massive parallelism performed on manycore processors,” said Pe’er. He said the architecture is positioned as a general-purpose accelerator for applications with a high degree of inherent parallelism, allowing HyperCore to act as an extension of the most popular processor architectures (x86, PowerPC, and ARM).
The HyperCore architecture includes 16-256 cores and multi-ported L1 shared memory in which each core is equidistant from the memory. A key component of the architecture is a hardware-based, low-latency, high-throughput synchronizer/scheduler that manages the cores according to a task map and balances the load among the cores. The synchronizer/scheduler ensures scalable performance that enables nearly linear speedup, regardless of the number of cores in the processor. Among the many applications ideal for the HyperCore processor are image and video processing, video surveillance, gaming, network processing, security, and software-defined radio.
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