From the early days of SOCs (systems on chips), when the devices were simply single-chip integrations of board-level microcomputers, their architectural evolution has followed a single clear path. Architects added memory. They integrated application accelerators to execute specific, clearly defined tasks with greater speed and less energy. They introduced more complex interconnect structures and DRAM controllers to support data flows among the blocks.
Then, Intel announced a change of direction in the server market. Under pressure from the realities of less-than-100-nm processes, Intel shifted its focus from ever-faster CPUs to multiple simpler CPUs on one die. This new way to use the transistor budget delivered Intel from the futile search for greater instruction-level parallelism and saved it from the growing energy cost of higher clock frequencies. It also fit the needs of the server world, in which job mixes often present a rich pool of independent threads to execute on the multiple cores.
Today, some SOC architects view the multicore movement as irrelevant to the embedded, often hard-real-time world of SOCs.
Will systems on chips follow server CPUs down the road to having many identical processor cores on a die?
