Claiming a 2X to 3X speed-up in overall design turnaround time compared to the previous release, Synopsys Inc. Monday (Sept. 29) released IC Compiler 2008.09.
Synopsys said the new release introduces new technology that speeds design closure, including improved timing, variation-aware clock-tree synthesis, lower power, enhanced DFM, and signoff-quality incremental design- rule checking.
Beginning with this release, Synopsys’ Zroute multi-threaded router technology, announced earlier this year, is now available as a standard feature to all IC Compiler customers, Synopsys said.
