FORTH is a structured, imperative, stack-based, computer programming language and programming environment [Wiki], designed by Chuck Moore. Here is an article on Dr. Dobb’s by Stephen Pelc examines the relationship between software and silicon, and discuss a search for simplicity to improve performance and reduce chip size and power consumption. In his previous article, he focused on the impact of modern Forth compiler design on current register-oriented CPUs.
For those of you whose software life is based around C and other “Pasgol” languages, shift your perspective of Forth and start thinking of it as a two-stack silicon machine. Forth compilers for conventional CPUs just map this model onto a register-oriented model. We will also see how to map the C virtual machine (VM) onto a two-stack VM.
Chips designed to run Forth well have been produced for more than 20 years, including the Novix NC4000, the Harris/Intersil RTX2000, and Silicon Composers SC32. There has been a flurry of cores for implementation in FPGAs, including MicroCore. Today, the state of the art is the 40-core SEAforth processor from IntellaSys. (Later in this article, I look at the C18 core and interconnects used in the SEAforth chips.) But first, I examine changes to the canonical Forth VM to achieve the goals of performance and code size.
