EDN Executive Editor Ron Wilson expresses his views on research papers presented at Hot Interconnects conference.
“The lead-off session at the undeservedly little-attended Hot Interconnects conference at Stanford this morning examined the growing challenge on chip interconnect technology as today’s small-scale multicore processors evolve into chips with tens or hundreds of processor cores. Papers examined two primary issues: the increased need for on-chip bandwidth between processors and memory instances, and the need for bandwidth between the chip and external DRAM, the latter on the assumption that memory hierarchies may come and go, but DRAM will be with us forever.”
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1 Hybrid NoC: another approach to networks on multicore chips // Aug 28, 2008 at 1:21 pm
[...] his views on research papers presented at Hot Interconnects conference. Yesterday, he wrote about photonic alternatives to interconnect for many-core processors and SoCs. Today, he talks about a blend of conventional routing and fast global electrical lines to create [...]